EE5320: Analog Integrated Circuit Design, Jan.-May 2016
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Instructor: Nagendra Krishnapura
Course syllabus, schedule, and assignments can be seen here. If you wish to download these lectures for offline viewing, you may have to disable the player plugin on your browser.
Lectures
2016-01-11: Introductory lecture
2016-01-12 (
notes): Components available in a CMOS process; Resistors; Random mismatch
2016-01-13 (
notes): Random and systematic mismatch; Layout techniques to minimize mismatch
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2016-01-18 (
notes): MOS transistor layout; 4 terminal MOS transistor model; Body effect
2016-01-19 (
notes): Influence of body effect on small and large signal behaviour of basic amplifier circuits
2016-01-20 (
notes): Small signal model of the MOS transistor; Transit frequency
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2016-02-09 (
notes): Basics of noise-variance, autocorrelation, spectral density; Resistor noise
2016-02-10 (
notes): Resistor noise; kT/C across a capacitor; Circuit noise calculations; MOS transistor noise
2016-02-11 (
notes): MOS transistor thermal and flicker noise
2016-02-15 (
notes): Noise calculations; Single stage opamp frequency response
2016-02-16 (
notes): Noise calculations; Single stage opamp frequency response
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2016-02-24: Quiz I discussions
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2016-03-01 (
notes): Negative feedback amplifier using an integrator; Step response and transfer function of such an amplifier
2016-03-02 (
notes): Negative feedback amplifier using an integrator; Loop gain and unity loop gain frequency
2016-03-03 (
notes): Negative feedback amplifier using an integrator; Finite dc gain and steady state error
2016-03-07 (
notes): Increasing the dc gain of the opamp; Folded cascode structure
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2016-03-09 (
notes): Folded cascode opamp dc gain; Noise in a telescopic cascode opamp
2016-03-10 (
notes): Noise in a folded cascode opamp; Improving the dc gain of an opamp
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2016-03-22 (
notes): Analysis of fully differential circuits using common-mode and differential half circuits
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2016-04-19 (
notes): 3 state phase frequency detector; Incremental phase domain model of the PLL
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2016-04-21 (
notes): Reference feedthrough in a type-I PLL; Type II PLL derivation
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Notes
Assignments
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Assignment 2: Mismatch; Basic amplifier analysis. Due on 22nd Feb. 2016
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Assignment 5: Oscillators and Phase locked loops. Due on 26th Apr. 2016
Exercises
Quizzes