Video lectures from the iCS group @ IIT Madras

EE5320: Analog Integrated Circuit Design, Jan.-May 2016

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Instructor: Nagendra Krishnapura

Course syllabus, schedule, and assignments can be seen here. If you wish to download these lectures for offline viewing, you may have to disable the player plugin on your browser.

Lectures

  1. 2016-01-11: Introductory lecture
  2. 2016-01-12 (notes): Components available in a CMOS process; Resistors; Random mismatch
  3. 2016-01-13 (notes): Random and systematic mismatch; Layout techniques to minimize mismatch
  4. 2016-01-14 (notes): Resistor model; Capacitors
  5. 2016-01-18 (notes): MOS transistor layout; 4 terminal MOS transistor model; Body effect
  6. 2016-01-19 (notes): Influence of body effect on small and large signal behaviour of basic amplifier circuits
  7. 2016-01-20 (notes): Small signal model of the MOS transistor; Transit frequency
  8. 2016-01-21 (notes): Transit frequency
  9. 2016-02-08 (notes): MOS transistor mismatch; Noise
  10. 2016-02-09 (notes): Basics of noise-variance, autocorrelation, spectral density; Resistor noise
  11. 2016-02-10 (notes): Resistor noise; kT/C across a capacitor; Circuit noise calculations; MOS transistor noise
  12. 2016-02-11 (notes): MOS transistor thermal and flicker noise
  13. 2016-02-15 (notes): Noise calculations; Single stage opamp frequency response
  14. 2016-02-16 (notes): Noise calculations; Single stage opamp frequency response
  15. 2016-02-17 (notes): Single stage opamp noise; Input referred noise
  16. 2016-02-18 (notes): Single stage opamp offset, swing limits, slew rate
  17. 2016-02-24: Quiz I discussions
  18. 2016-02-25 (notes): Cascode current mirror
  19. 2016-02-29 (notes): Telescopic cascode opamp
  20. 2016-03-01 (notes): Negative feedback amplifier using an integrator; Step response and transfer function of such an amplifier
  21. 2016-03-02 (notes): Negative feedback amplifier using an integrator; Loop gain and unity loop gain frequency
  22. 2016-03-03 (notes): Negative feedback amplifier using an integrator; Finite dc gain and steady state error
  23. 2016-03-07 (notes): Increasing the dc gain of the opamp; Folded cascode structure
  24. 2016-03-08 (notes): Folded cascode opamp swing limits
  25. 2016-03-09 (notes): Folded cascode opamp dc gain; Noise in a telescopic cascode opamp
  26. 2016-03-10 (notes): Noise in a folded cascode opamp; Improving the dc gain of an opamp
  27. 2016-03-14 (notes): Multi-stage Miller compensated opamps
  28. 2016-03-15 (notes): Multi-stage feedforward opamps
  29. 2016-03-16 (notes): Transistor realization of the two-stage opamp
  30. 2016-03-17 (notes): Two-stage opamp-noise, mismatch and slew rate
  31. 2016-03-21: Fully differential circuits (no recording-link to last year's lecture)
  32. 2016-03-22 (notes): Analysis of fully differential circuits using common-mode and differential half circuits
  33. 2016-03-23 (notes): Common mode feedback
  34. 2016-03-28 (notes): Common mode feedback circuits
  35. 2016-03-30 (notes): Common mode feedback circuits
  36. 2016-03-31 (notes): Fully differential two-stage opamp
  37. 2016-04-04 (notes): Loop gain and stability
  38. 2016-04-05 (notes): Loop gain and stability-poles and zeros as delays
  39. 2016-04-06 (notes): Loop gain and stability
  40. 2016-04-07 (notes): Loop gain and stability
  41. 2016-04-11 (notes): Nyquist plot, stability criteria for feedback loops
  42. 2016-04-12 (notes): Frequency multiplication using a phase locked loop
  43. 2016-04-19 (notes): 3 state phase frequency detector; Incremental phase domain model of the PLL
  44. 2016-04-20 (notes): Incremental model of the PLL
  45. 2016-04-21 (notes): Reference feedthrough in a type-I PLL; Type II PLL derivation
  46. 2016-04-22 (notes): Type II PLL; Charge pump and loop filter realization

Notes

Assignments

  1. Assignment 1: Noise calculations. Due on 22nd Feb. 2016
  2. Assignment 2: Mismatch; Basic amplifier analysis. Due on 22nd Feb. 2016
  3. Assignment 3: Negative feedback. Due on 14th Mar. 2016
  4. Assignment 4: Negative feedback. Due on 18th Apr. 2016
  5. Assignment 5: Oscillators and Phase locked loops. Due on 26th Apr. 2016

Exercises

  1. Simulation exercises: Simulation exercises. Use the 0.18μm models from this link.

Quizzes