Video lectures from the iCS group @ IIT Madras

EE5310: Analog Electronic Circuits/EE3002 Analog Circuits(Aug.-Nov. 2014)

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Instructor: Nagendra Krishnapura

This is an introductory course on Analog Circuits. Problem sets and other instructions can be found here. Familiarity with basic linear electrical networks is assumed. At IIT Madras, the prerequisite courses are Electrical and Magnetic Circuits and Networks and Systems.

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Lectures

  1. 2014-07-31(pdf): Need for nonlinear circuits; Incremental gain of a two port nonlinear circuit
  2. 2014-08-01(pdf): Constraints on y-parameters and large signal characteristics to obtain a high gain; MOS transistor
  3. 2014-08-05(pdf): MOS transistor characteristics
  4. 2014-08-06(pdf): AC coupling network to add signal to bias
  5. 2014-08-07(pdf): (no recording) AC coupling at input and output; Common source amplifier
  6. 2014-08-08(pdf): Output conductance of a MOS transistor; Inherent gain limitation of a transistor
  7. 2014-08-12(pdf): Opamp amplifier; Effect of finite dc gain; Loop gain of a feedback system; Parasitic pole
  8. 2014-08-13(pdf): First and second order opamps in feedback; Step response
  9. 2014-08-14(pdf): (no recording) Instability with a third order system in feedback; Significance of loop gain and unity loop gain frequency
  10. 2014-08-19(pdf): Stability criterion in terms of loop gain; Phase margin
  11. 2014-08-20(pdf): Dominant pole frequency compensation;
  12. 2014-08-26(pdf): Miller compensation of a two stage amplifier;
  13. 2014-08-27(pdf): Miller compensation of a two stage amplifier; Pole splitting
  14. 2014-08-28(pdf): Sensitivity of gm to transistor parameters; Biasing a transistor at a constant current; Drain feedback configuration
  15. 2014-09-02(pdf): Common source amplifier using drain feedback
  16. 2014-09-03(pdf): Swing limits
  17. 2014-09-05(pdf): Audio missing for a portion of this Swing limits; Common source amplifier using current mirror bias
  18. 2014-09-09(pdf): Audio missing for a portion of this Common source amplifier using current mirror bias; Source feedback bias
  19. 2014-09-10(pdf): Common source amplifier using source feedback bias; Using a resistor instead of a current source for biasing
  20. 2014-09-11(pdf): Further biasing techniques; VCVS using a transistor
  21. 2014-09-16(pdf): Source follower(VCVS) biasing, swing limits
  22. 2014-09-17(pdf): CCVS using a transistor(drain feedback transimpedance amplifier); CCVS using an opamp
  23. 2014-09-29(pdf): Biasing the transimpedance amplifier; Feedback circuit miscellania
  24. 2014-09-29(pdf): Common gate amplifier(current controlled current source)
  25. 2014-09-30(pdf): Biasing a common gate amplifier; Voltage controlled current source using a transistor
  26. 2014-10-01(pdf): Discussion on controlled sources using a transistor and an opamp; pMOS transistor and its small signal model
  27. 2014-10-01(pdf): Converting nMOS circuits to pMOS; Biasing a pMOS transistor
  28. 2014-10-07(pdf): Biasing pMOS transistors; Gain limitation in a common source amplifier; Introduction to the active load
  29. 2014-10-08(pdf): Realizing all 4 types of controlled sources using negative feedback; Two transistor feedback circuits
  30. 2014-10-10(pdf): Common source amplifier with active load
  31. 2014-10-14(pdf): Common source amplifier with active load; CMOS inverter
  32. 2014-10-15(pdf): CMOS inverter; Realizing an opamp-difference amplifier
  33. 2014-10-15(pdf): Differential pair with a current mirror load; Common mode and differential signals and equivalent circuits of symmetric circuits
  34. 2014-10-16(pdf): Differential pair with a current mirror load-small signal equivalent
  35. 2014-10-17(pdf): Differential pair with a current mirror load-small signal equivalent; common mode and output swing limits
  36. 2014-10-23(pdf): Differential pair with a current mirror load-Common mode and output swing limits; pMOS versus nMOS input pair; Adding an output buffer
  37. 2014-10-24(No recording): Single stage opamp with an output buffer
  38. 2014-10-29(pdf): Two stage opamp; pMOS vs. nMOS in the second stage; Feedback around transistors in a multi-stage feedback loop
  39. 2014-10-31(pdf): Two stage opamp-gain and swing limits; systematic offset and its elimination; Miller compensation of a two stage opamp for stability
  40. 2014-11-05(pdf): Two stage opamp-Miller compensation of a two stage opamp for stability; Swing limits; Slew rate
  41. 2014-11-07(pdf): Bipolar junction transistor-large and small signal models
  42. 2014-11-12(pdf): BJT circuits: Biasing; Common source amplifier; Emitter follower

Problem sets

  1. Problem set 1: 21 August 2014
  2. Problem set 2: 12 September 2014
  3. Problem set 3: 18 September 2014
  4. Problem set 4: 8 October 2014
  5. Problem set 5: 21 October 2014
  6. Problem set 6: 28 October 2014
  7. Problem set 7: 11 November 2014
  8. Problem set 8: 14 November 2014

Quizzes

  1. 2014-08-22: Quiz I
  2. 2014-09-23: Quiz II
  3. 2014-10-09: Quiz III
  4. 2014-10-30: Quiz IV