Integrated Circuits and Systems group, IIT Madras

EE5390/EC5190: Analog Integrated Circuit Design (Jan-May 2014)


  • email: ani AT ee*iitm*ac*in
  • Office: ESB246A
  • Office Hours: By appointment (email)


  • ESB242


B slot - Mo 9am, Tu 8am, W 12pm F 11am

Teaching Assistants

Gaurav: ee12s056 AT ee*iitm*ac*in

Prathamesh: ee13s007 AT ee*iitm*ac*in

Ajmal: ee12m061 AT ee*iitm*ac*in

Mahesh: ee12m067 AT ee*iitm*ac*in

Goutham: ee12m066 AT ee*iitm*ac*in

Course Contents

Introduction to IC Design; Mismatch & Noise; Negative Feedback, Frequency compensation; 1-stage, 2-stage and fully-differential CMOS opamps; Application Circuits: Phase-locked loops and/or Bandgap references.


There will be two quizzes and an end semester exam according to the regular institute schedule, in addition to several regular assignments (including tutorials and projects). The two quizzes will count for 30% of the grade, the assignments for 30% of the grade and the end semester exam for the remaining 40%. The assignments will be discussed during tutorial classes that will be held periodically. These will count for up to an additional 10% of the grade, at the teacher's discretion.

Recorded lectures and notes

This year (2014), only a few lectures were completely recorded. Therefore it is suggested that you follow the video lectures from previous years that are available here. Most of the lecture material is the same. Typically, the first lecture has information on prerequisites and references.

The pdf notes for the 2014 class are available below.

  1. Cascode Circuits: Cascode stage, cascode current mirrors
  2. Noise and Offset: Noise in MOSFETs, input referred noise sources, sources of offset, matching, input referred offset voltage
  3. Feedback: Mathematical analysis of feedback systems
  4. Single stage opamps: Single stage opamps, gain, bandwidth, noise, slew rate
  5. Two stage opamps: Two stage opamps, gain, bandwidth, noise, slew rate
  6. Differential opamps: Differential opamps, common mode feedback
  7. Phase locked loops: Phase locked loops, type I and type II loops, phase-frequency detector, charge pump PLLs, VCO
  8. PLL design example: Phase locked loop design example


Problem sets will be posted below. You are expected to solve them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding tutorial session dates given below. Solve the problems cleanly in a notebook showing the steps clearly and show it to the TAs during tutorial sessions.

  1. Problem set 1(14th February 2014): Current Mirrors; Noise; Mismatch
  2. Problem set 2(7th March 2014): Feedback - delay and nonlinearity
  3. Problem set 3(7th March 2014): Opamp feedback, poles and zeros, loop gain
  4. Problem set 4(18th March 2014): Two stage opamps
  5. Problem set 5(30th April 2014): Fully-differential opamp design and simulation (project submission email id - ee5390(dot)2014(at)gmail(dot)com)
  6. Problem set 6(18th April 2014): Oscillators

Practice Problems (not for submission)

  • Noise: Razavi - Problems 7.6, 7.7, 7.8, 7.9
  • Mismatch: Razavi - Problems 13.15, 13.17, 13.18

CAD Info

For the simulation portions of the above assignments, you will use the TSMC 0.18µm CMOS process parameters from this website.

For this course, we recommend the use of Eldo simulator from Mentor Graphics as we have a good number of institute-wide licenses. You are welcome to use other simulators that may be available to you (e.g. LTSpice, Spectre or Hspice). Some of these also have a schematic-based entry for circuits and simulations. However, it will not be possible for us to provide TA support for multiple simulators. You will be mostly on your own if you choose to use something other than Eldo. You can find more information about installing and using Eldo, as well as about freeware circuit simulators here.

A basic eldo tutorial is available below. Make sure to make any appropriate changes to model files, power supply voltages etc: - Eldo Tutorial

Submit all solutions by email as a SINGLE pdf file only to ee5390(dot)2014(at)gmail(dot)com. Name your file with your id eexxxxx and assignment number yy as eexxxxxx_yy.pdf. Put your name and roll number on the first page. For joint submissions, put all the names on the first page and submit a single email. N people submitting jointly will all receive 2^[-(N-1)/2] times the graded credit for the assignment. Joint work masquerading as individual submissions (a.k.a. copying) will result in severe penalties: e.g. zero on all assignments.

Text book

The course doesn't follow a single textbook. However, the following book can be used as a reference for MOS circuit design and opamps, and for practice problems:

  • Behzad Razavi, Design of Analog CMOS Integrated Circuits, Tata McGraw-Hill Edition 2006 (ISBN: 0070529035).


  • EC5135 (Analog Electronic Circuits) or EC3102 (Analog Circuits)
  • Knowledge of the following topics is required: Linear circuit analysis; MOS transistor basics; small-signal equivalent circuits; small and large signal analysis; frequency domain analysis; single-transistor amplifiers; differential pairs.


Attendance will be strictly enforced and those falling short will not be permitted to write the end semester exam. TAs will go around the room taking attendance at the beginning of the class. If you are more than 5 min. late, please do not enter the classroom.