EE5320: Analog IC Design(Jan.-May 2021)
Instructors
Classroom
Schedule
D slot, MTech Calendar (Mo. 11-11:50am, Tu. 10-10:50am, We. 9-9:50am, Th. 12-12:50pm)
Course page on moodle
Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.
Teaching Assistants
Evaluation
Assignments (20%)
Quiz-I (20%)
Quiz-II (20%)
Final Exam (40%)
Course Objective
Understanding of MOS transistors: Focus on the behavior relevant to analog IC design.
Develop design intuition: Feel for tradeoffs – noise, dynamic range, power.
Design based on hand calculations: Avoid perpetual “tweaking” in SPICE.
Gain hands-on design experience: High performance amplifier design project.
Course Outline
Introduction and Basic Concepts: analog vs digital, applications of analog ICs, CMOS technology and devices, device mismatch and errors, MOS transistor behavior, noise in passives & MOSFETs, systematic design procedure for basic amplifier.
Advanced Topics: multi-stage amplifiers, compensation techniques & loop stability, transient response in amplifiers, designing amplifiers for transient response Gm-C integrators, Fully Differential Opamps.
(Possible) Special Topics: Switched capacitor circuits; High-speed amplifiers etc
Recorded lectures (videos and notes)
All notes so far in a single pdf file: Lecture notes
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2021-02-08: Noise in 2-port networks; input-referred noise
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2021-02-10: Input-referred noise of Common Source Amplifier - 1
2021-02-11: Input-referred noise of Common Source Amplifier - 2
2021-02-15: Input-referred noise calculation with capacitors
2021-02-16: Input-referred noise of Common Gate Amplifier
2021-02-17: Calculation of noise from Cascode device, active load
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2021-02-22: Calculation of noise of differential amplifier
2021-02-23: Introduction to Mismatch; Systematic mismatch
2021-02-24: Random Mismatch; Input-referred offset voltage
2021-02-25: Input-referred offset of differential amplifier
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2021-03-04: Cascode current mirrors; telescopic opamp datasheet - 1
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2021-03-15: Quiz 1 discussion; Folded Cascode opamp slew rate
2021-03-16: Two-stage opamp at the block level; Miller compensation
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2021-03-18: Two-stage opamp slew rate; opamp with low input CM voltage
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2021-03-23: Backgate effect; Two-stage opamp design example - 2
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2021-03-25: Two-stage opamp with pole-zero cancellation compensation
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2021-04-07: Three-stage opamp; Feedforward compensated opamp
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2021-04-09: Common Mode Feedback and its frequency compensation
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2021-04-12: Common Mode Feedback for Fully Differential two-stage opamp
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2021-04-14: Type-I PLL phase domain incremental model
2021-04-15: PLL phase bode plots; Tristate phase-frequency detector
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2021-04-18: Type-I PLL reference feedthrough; Type-II PLL
2021-04-19: Proportional and integral paths; Charge pump
2021-04-20: PFD and Charge Pump non-idealities; Type-II PLL Bode Plots
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2021-04-24: Cross-coupled LC oscillator; Varactors
2021-04-24: LC VCO analysis; Varactors; PLL design example
Assignments
Problem sets will be posted below. You are expected to solve them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding dates given below.
Homework 1:
pdf on process variations and mismatch -
Due 11:59pm on Sunday 14th March 2021
Homework 2:
pdf on single-stage amplifiers -
Due 11:59pm on Saturday 27th March 2021
Homework 3:
pdf on building blocks -
Due 11:59pm on Friday 16th April 2021
Homework 4:
pdf on Fully Differential Amplifiers -
Due 11:59pm on Thursday 29th April 2021
Homework 5:
pdf on Fully Differential Capacitive Feedback Amplifier -
Due 11:59pm on Sunday 16th May 2021
All simulation assignments/projects will be done on LTSpice (https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html). If you have access to another circuit simulator such as Spectre or Eldo through another course or through your research lab, you are welcome to use that simulator. Some simple simulation exercises for practice are listed below to get you started.
For the assignments and projects, use the IBM 130nm MOSFET Model Files from: http://www.ee.iitm.ac.in/~nagendra/cadinfo.html
References
This course doesn't follow a single textbook. You can follow any of the references below for different sections of the course.
Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, August 2000.
The Design Of CMOS Radio-Frequency Integrated Circuits by Thomas H. Lee (Publisher: Cambridge University Press - 2006)
Carusone, Johns, and Martin, Analog Integrated Circuit Design, 2nd ed., Wiley, 2000.
Gray, Hurst, Lewis, and Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley 2009.
This course will mostly follow the lines of NPTEL course whose link is given below.
Knowledge of negative feedback control systems is essential for a good understanding of circuits. The book below is a very good reference. Chapters 8, 9, and 10 are particularly relevant to us.
Pre-requisites
If you are little rusty on basic circuit analysis or laplace transforms, refresh them from the references below or any of the widely used textbooks. In particularly, we will use Bode plots and Laplace transforms widely-they are described at the last two links below.
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Bode plots: Recorded lectures
here and
here
Circuit analysis with Laplace Transforms: Follow lectures 5-8 at
this link to refresh your understanding of laplace transform analysis, sinusoidal steady state etc. Solve the practice problems in
this problem set.
Attendance
Attendance will be strictly enforced as per the latest IITM rules and regulations. Those falling short will not be permitted to write the end sem exam.