Video lectures from the iCS group @ IIT Madras

EE5320: Analog Integrated Circuit Design, Jan.-May 2015

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Instructor: Nagendra Krishnapura

Course syllabus, schedule, and assignments can be seen here. If you wish to download these lectures for offline viewing, click on the link, replace the .html with .mp4 and view it in a media player.


  1. 2015-01-12: Negative feedback system using an integrator
  2. 2015-01-13: Negative feedback amplifier: step response, frequency resonse(Some parts at the end not recorded due to power failure) For basics of sinusoidal steady state response, refer to these videos. The last one in the playlist has a summary of the three methods.
  3. 2015-01-14: Negative feedback amplifier: frequency response
  4. 2015-01-16: Loop gain and frequency response of a negative feedback amplifier; Excess delay
  5. 2015-01-19: Negative feedback amplifier with excess delay in the loop
  6. 2015-01-20: Negative feedback amplifier with excess delay in the loop; Extra poles in the loop
  7. 2015-01-21: Stability with extra poles and zeros in the loop; Connection to excess delay
  8. 2015-01-23: Stability analysis via the loop gain; Nyquist criterion
  9. 2015-01-24: (no recording) Nyquist stability criterion; Loop gain and phase margin; Opamp implementation
  10. 2015-01-28: Synthesis of opamp topologies; Current buffer to boost output resistance; Two stage Miller opamp
  11. 2015-01-30: Two- and three-stage Miller compensated opamp; Constraint on the speed of different stages
  12. 2015-02-03: Two stage Miller compensated opamp analysis
  13. 2015-02-04: Two stage Miller compensated opamp analysis; RHP zero cancellation
  14. 2015-02-05: Synthesis of a two stage feedforward compensated opamp
  15. 2015-02-09: Feedforward compensated opamp-Loop gain and phase margin; Slow settling for step inputs
  16. 2015-02-10: Feedforward compensated opamp loop gain; Slow settling; Three stage feedforward opamp
  17. 2015-02-11: Components available in a CMOS process; Systematic mismatch; Ratiometric layout
  18. 2015-02-13: Gradients and common centroid layout; Random mismatch in components
  19. 2015-02-16: Random mismatch; Noise in resistors
  20. 2015-02-17: Noise in resistors; kT/C noise on a capacitor
  21. 2015-02-18: Noise in resistors; Four terminal MOS transistor model; Body effect; influence on a common-source amplifier
  22. 2015-02-20: Body effect in common-drain and common-gate amplifiers
  23. 2015-03-02: Tutorial 2 discussion; Thermal noise in a MOS transistor
  24. 2015-03-03: Flicker noise in a MOS transistor; Noise scaling
  25. 2015-03-04: Noise scaling; Single stage opamp noise and offset (If you want to brush up the basic differential pair, go through lectures 33, 34, 35, 36, 37 of Analog Circuits)
  26. 2015-03-09: Single stage opamp offset and noise
  27. 2015-03-11: Single stage opamp noise
  28. 2015-03-13: Capacitances in a MOS transistor; Frequency response of a differential pair
  29. 2015-03-16: Tradeoffs in an opamp; Increasing the gain-cascode opamp
  30. 2015-03-17: Telescopic cascode opamp; High swing cascode biasing
  31. 2015-03-20: Telescopic cascode opamp-noise, offset, parasitic poles; Folded cascode opamp
  32. 2015-03-23: Folded cascode opamp-dc gain, noise, offset, slew rate
  33. 2015-03-25: Two stage opamp: Gain, slew rate
  34. 2015-03-25: Two stage opamp, cont'd: Noise, offset, swing limit
  35. 2015-03-27: Fully differential circuits-motivation; Fully differential single stage opamp
  36. 2015-03-30: Half circuit analysis of fully differential circuits; Fully differential single stage opamp frequency response; No recording; You can refer to these lectures—30 and 31 from previous years or 39 and 40 from the NPTEL course on Analog IC Design
  37. 2015-03-31: Noise, slew rate, offset of fully differential single stage opamp; Common mode feedback and its other realizations
  38. 2015-04-08: Fully differential single stage opamp
  39. 2015-04-10: Fully differential two stage opamp
  40. 2015-04-13: Fully differential two stage opamp
  41. 2015-04-15: Frequency multiplication-basic topology of a phase locked loop
  42. 2015-04-16: PLL with a 3 state phase/frequency detector
  43. 2015-04-17: Type I PLL model; Response to a phase step
  44. 2015-04-17: Type I PLL model; Periodic error in the phase
  45. 2015-04-20: Eliminating periodic phase errors-Type II PLL; Incremental model
  46. 2015-04-20: PFD and charge pump implementation; Extra poles in the loop filter; Course summary



  1. Problem set 1: 2nd February 2015 (Negative feedback systems)
  2. Problem set 2: 27th February 2015 (Negative feedback systems; Noise)
  3. Problem set 3: 18th March 2015 (Noise, Mismatch, MOS IC components, Opamp)
  4. Problem set 4: 7th April 2015 (Differential and common mode behavior, common mode loop gain)
  5. Problem set 5: 22nd April 2015 (CMOS component characteristics)
  6. Problem set 6: 24th April 2015 (Oscillators)
  7. Problem set 7: 3rd May 2015 (Fully differential opamp; Bandgap reference)
    • Lectures 53 and 54 from the NPTEL course have a description of the bandgap reference
  8. Problem set 8: 27th April 2015 (Phase locked loop-basic calculations)


  1. Simulation exercises: Simulation exercises. Use the 0.18μm models from this link.


  1. 2015-02-24: Quiz I
  2. 2015-03-24: Quiz II