Integrated Circuits and Systems group, IIT Madras

EE5320: Analog IC Design(Jan.-May 2016)



  • ESB106


D slot(Mo. 11am, Tu. 10am, We. 9am, Th. 12pm)

Course page on moodle

Registered students can login and see the course page at Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Teaching Assistants

Login to moodle at to post questions and contact TAs and faculty.


There will be two quizzes(30%), a final exam(40%), and regular assignments(30%).

Recorded lectures

The recorded lectures are available here. You can also find lectures from previous years at the same link.


Problem sets will be posted below. You are expected to solve them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding dates given below.

  1. Assignment 1: Noise calculations. Due on 22nd Feb. 2016
  2. Assignment 2: Mismatch; Basic amplifier analysis. Due on 22nd Feb. 2016
  3. Assignment 3: Negative feedback. Due on 14th Mar. 2016
  4. Assignment 4: Negative feedback. Due on 18th Apr. 2016
  5. Assignment 5: Oscillators and phase locked loops. Due on 26th Apr. 2016

The following assignments are for your practice.

  1. Simulation exercises: Simulation exercises. Use the 0.18μm models from this link.


In this course, we will discuss the design of analog circuits on integrated circuits. Realization of negative feedback circuits is a common thread to all the circuits that we see in this course. We will start with a discussion of components available on CMOS ICs, their modeling, and layout. We will then discuss noise and mismatch, which limit circuit capabilities in some ways. We then discuss negative feeback systems and their stability, and various opamp types(single stage, cascode, multi-stage, and their fully differential versions) used to realize negative feedback systems on a chip. Similar attempts to realize a frequency multiplier using negative feedback will lead us to the phase locked loop. We will analyze the main types of PLLs, and derive their incremental phase domain models commonly used for analysis. After these, we will look at bandgap references, voltage regulators, and current references as additional examples.


This course doesn't follow a single textbook. You can follow any of the references below for different sections of the course.

  • Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, August 2000.
  • Carusone, Johns, and Martin, Analog Integrated Circuit Design, 2nd ed., Wiley, 2000.
  • Gray, Hurst, Lewis, and Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley 2009.

This course will mostly follow the lines of NPTEL course whose link is given below.

Knowledge of negative feedback control systems is essential for a good understanding of circuits. The book below is a very good reference. Chapters 8, 9, and 10 are particularly relevant to us.


If you are little rusty on basic circuit analysis or laplace transforms, refresh them from the references below or any of the widely used textbooks. In particularly, we will use Bode plots and Laplace transforms widely-they are described at the last two links below.


Attendance will be strictly enforced and those falling short will not be permitted to write the end sem exam. TAs will go around the room taking attendance at the beginning of the class. If you are more than 5 min. late, please do not enter the classroom.