| E6316 Home | Schedule/Assignments | Handouts | Project | Home | Teaching |
| Start date | 09/07/04 | ||||
| Date | Syllabus | Chapters from textbook | Homework assignment | Homework Due | |
| 1 | 09/07/04 | Analog and Digital signals; VLSI systems; Data converters; D/A converters-characteristics and nonidealities; A/D converters-characteristics and nonidealities | 9.1-9.2, 11 | HW1 | |
| 2 | 09/14/04 | D/A converters: Resistor string converters | 12 | HW1 | |
| 3 | 09/21/04 | D/A converter circuits: binary weighted converters | 12 | HW2 | |
| 4 | 09/28/04 | Mismatch in electronic components; Current mode D/A converters; D/A converter calibration | 12; 2.4 | HW3 | HW2 |
| 5 | 10/05/04 | Hybrid(segmented) D/A converters; Flash A/D converters; latch design; offset cancellation | 12.4; 13.4 | HW3 | |
| 6 | 10/12/04 | Flash A/D converters; latch design; interpolation; 2 step Flash converters | 13.4-13.7 | ||
| 7 | 10/19/04 | 2 step flash converters; digital error correction; Intro. To pipelined converters; sampling circuits | 13.4-13.7 | HW4 | |
| 8 | 10/26/04 | Midterm(90 min., closed book), sampling circuits(45 min. lecture) | 13.3 | Project | |
| 11/02/04 | Fall Break | ||||
| 9 | 11/09/04 | Pipelined Algorithmic A/D converters; 1.5 bits/stage operation | 13.8, reference | HW5 | HW4 |
| 10 | 11/16/04 | Pipelined Algorithmic A/D converters; switched capacitor circuits for pipelined converters | 13.8 | ||
| 11 | 11/23/04 | Switched capacitor circuits for pipelined converters; A/D converter building blocks at the transistor level; Algorithmic and Successive approximation converters. | 13.9, 10.6, 10.7 | HW6 | HW5 |
| 12 | 11/30/04 | Integrating A/D converters; Time interleaved A/D converters; Miscellaneous topics-reduction of mismatch induced errors in pipelined converters; folding and averaging; bipolar sample and hold circuits | 13.1, 13.7, 13.9 | ||
| 13 | 12/07/04 | Oversampled converters | 14 | HW6 | |
| 12/14/04 | Study break | Project | |||
| 12/21/04 | Final(150 min., closed book) |