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| ===== 2019 ===== | ===== 2019 ===== | ||
| + | * Raviteja Theertham, Prasanth Kootala, Sujith Billa, and Shanthi Pavan, "A 24mW chopped CTDSM achieving 103.5dB SNDR and 107.5dB DR in a 250kHz bandwidth," // IEEE Symposium on VLSI Circuits, Kyoto, Japan //, June 2019. | ||
| * Raviteja Theertham and Shanthi Pavan, "Unified analysis, modeling, and simulation of chopping artifacts in continuous-time delta-sigma converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | * Raviteja Theertham and Shanthi Pavan, "Unified analysis, modeling, and simulation of chopping artifacts in continuous-time delta-sigma converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | ||
| * Kishalay Dutta, Vinod Menezes and Shanthi Pavan, "Analysis and design of cyclic switched-capacitor DC-DC converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | * Kishalay Dutta, Vinod Menezes and Shanthi Pavan, "Analysis and design of cyclic switched-capacitor DC-DC converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | ||