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| [[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2018/material/EE6361-eDRAM-Janakiraman-2018.pdf|eDRAM Lecture Slides (2018)]] | [[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2018/material/EE6361-eDRAM-Janakiraman-2018.pdf|eDRAM Lecture Slides (2018)]] | ||
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| + | ===== Class 10 (22 Mar 2018) ===== | ||
| + | * Write time calculation | ||
| + | * Hierarchical sensing | ||
| + | * 3T Micro Sense Amp | ||
| + | * Micro Sense Amp Evolution | ||
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| + | Barth, J. et al., “A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 1, JANUARY 2008. [[http://ieeexplore.ieee.org/document/4443182/|PDF]] | ||
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| + | [[https://forms.gle/7fZHaL8i231yZ9VW7|In class quiz]] | ||
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