Integrated Circuits and Systems group, IIT Madras

This is an old revision of the document!


EE6324: Phase-Locked Loops(May-Aug. 2020)

Instructor

Classroom

  • Online

Schedule

  • Tue./Thu.: 4:00-5:15 PM
  • Alternate Friday

Course page on moodle

Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Teaching Assistants

Login to moodle at https://courses.iitm.ac.in/ to post questions and contact faculty.

Evaluation

  • Assignments (10%)
  • Quiz-I (20%)
  • Quiz-II (20%)
  • Project (20%)
  • End Sem (30%)

Recorded lectures

The recorded lectures are listed below.

  1. Lecture#1(pdf): Introduction to PLLs
  2. Lecture#2(pdf): Crystal/LC oscillator as clock source, Basic operation of a PLL
  3. Lecture#3(pdf): Basic operation of a PLL with mixer, loop filter, and voltage controlled oscillator at block level
  4. Lecture#4(pdf): Basic operation of a PLL with mixer, loop filter, and voltage controlled oscillator at block level (contd.)

Assignments

Assignments will be posted below. You are expected to solve them on your own. You should submit each one by 09:00AM of the due date mentioned. Copying will carry strict penalties.

Course contents

Topics include analog and digital integer-N phase-locked loops (PLLs). Building blocks include phase/frequency detectors, charge-pump, LC/ring-oscillators, multi-modulus frequency dividers, active/passive loop-filter, etc.

Objectives

To develop intuition behind frequency synthesizer design, learning mathematical basis behind operation, and realizing PLLs at architecture and transistor level.

References

  • F. Gardner, Phaselock Techniques, John Wiley & Sons, 2005.
  • W. Egan, Phase-Lock Basics, John Wiley & Sons, 2008.
  • R. Best, Phase-Locked Loops : Design, Simulation, and Applications, McGraw Hill, 2003.

Pre-requisites

Attendance

Attendance will be strictly enforced.