- ESB127

E slot(Tu 11-11:50am; W 10-10:50am; Th 8-8:50am; Fr 4:50-5:40pm)

Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Login to moodle at https://courses.iitm.ac.in/ to post questions and contact TAs and faculty.

There will be two quizzes. These will count for 50% of the grade and the end semester exam for the remaining 40%. Biweekly tutorials will count for 10% of the grade.

The recorded video lectures from a previous year of the course are available here.

Lecture notes (pdf) from this year's classes:

Problem sets will be posted below. You are expected to solve them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding dates given below. (The dates below are only tentative ones and can be changed at any time)

- Problem set 1 - Due 18 August 2017
- Problem set 2 - Due 01 September 2017
- Problem set 3 - Due 22 September 2017
- Problem set 4 - Due 6th October 2017
- Problem set 5 - Due 3rd November 2017
- Problem set 6 - Due 10th November 2017
- Problem set 7 - Due 10th November 2017

Simulation Assignments will be posted below. You are expected to do them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding dates given below. (The dates below are only tentative ones and can be changed at any time)

**Two port parameters**:- lectures 20(second half), 21, 24, 25, 26 of Prof. Dutta Roy's course on circuit theory at NPTEL. Problems in two port parameters are in lectures in 23, 25, 29

**Circuit analysis with Laplace Transforms**: Follow lectures 5-8 at this link to refresh your understanding of laplace transform analysis, sinusoidal steady state etc. Solve the practice problems in this problem set.

- Electrical and Magnetic Circuits or Electric Circuits and Networks
- Networks and Systems or Signals and Systems
- Analog Systems and Laboratory

If you are more than 5 min. late, please do not enter the classroom.