Our research is sponsored by several funding agencies - ranging from Government research offices to semiconductor companies. We are ALWAYS looking for qualified and motivated individuals to work on specific aspects of these research projects. Many times, this work could also form part of your thesis towards an IIT-Madras degree (M.S and/or PhD). So, if you are interested in a research position, send me Email with a comprehensive resume. Another advantage of a project position (even if you are not registered in an IIT-Madras degree program) is the opportunity to credit our basic and advanced courses which can later be counted towards your degree. A valid GATE score is NOT NECESSARY (at the time of writing) to be admitted into the M.S program - a GRE score is acceptable. The salary from a research project is usually more than the Institute stipend.

A unique aspect of IIT-Madras is the M.S program. On paper (for administrative purposes), an M.S degree is equivalent to the well known M.Tech degree. However, there are several fundamental differences between the two programs. An M.Tech program is largely course-based. The students take a prescribed set of core and elective courses (about 12-15 in number). A project is required - however, due to the time that one needs to spend on course work, it is usually not possible to do a complete/thorough job of the project. This is a particularly bad situation for serious work in the analog/mixed-signal design area due to the following. Knowledge/intuition/understanding results only when one does a real design - meaning a complete integrated circuit design.

IC design involves

1. Choosing a set of challenging, yet achievable, specifications.
2. Designing circuits that meet these specifications over manufacturing variations
3. "Laying out" the components in a manner that does not degrade circuit performance, and adhering to the rules set by the chip fabrication house
4. Sending the design out to a chip manufacturing foundry (e.g. TSMC) for fabrication
5. Designing a Printed Circuit Board (PCB) to test the chip after it comes back from the foundry
6. Measuring the IC and making sure that the specifications chosen in step.1 are indeed met.
7. Communicating the research findings to a scientific audience through journal or conference presentations.

Due to the complexities involved in today's ICs, state-of-the-art Computer Aided Design (CAD) tools are needed to accomplish Steps 2 and 3 above. Our laboratories are fully equipped with industry standard tools (e.g Cadence/Mentor). We also have agreements with semiconductor foundries that enable our students to fabricate their chips. The fabrication process takes about three months. The whole design/fabricate/test cycle typically takes about a year and a half.

It must now be apparent why an M.Tech program in analog/mixed-signal design is necessarily incomplete - one spends most of the time on course-work, leaving little time for much else. Typically our M.Tech students are able to get through Steps 1 and 2, and in a very few cases, Step 3.

The M.S program, on the other hand, is ideal for IC design. First, the course requirements are lot smaller (5 courses, as opposed to 12 for an M.Tech). There is more freedom in the timing and choice of courses - for example you could do two courses a semester, freeing up much-needed time for design activity. You get to go through the full design cycle - Steps 1-7 above. Apart from the (priceless) joy of seeing your own IC work, it gives you a confidence that can only be obtained by doing. Needless to say, our M.S students are in very high demand by the industry, due to the completeness of their training. Contributing to papers in prestigious journals and conferences is another aspect that can enhance your career prospects. If you are eventually inclined towards working for a Ph.D, of course, the M.S is an ideal platform. What I wish to point out is that the M.S is a better program even if you are interested in an industrial career. As an aside, no company would probably trust a fresh college graduate with a challenging IC design project due to the high cost of failure. In academia, you will get this chance - to even work on crazy-sounding ideas, which you may not be able to try out in industry.

M.S admissions happen twice a year, and are through a test/interview. Watch the newspapers, or the IIT-Madras website for the advertisement.

Over the years, our M.S students have contributed to the design of several high performance ICs. Some examples of publications that have resulted are given below. You are encouraged to read them to get an idea of the projects we are involved in.

1. V. Singh, N. Krishnapura and S. Pavan, ``Compensating for quantizer delay in excess of one clock cycle in continuous-time Delta-Sigma modulators", IEEE Transactions on Circuits and Systems : Express Briefs, September, 2010.


2. S. Pavan and P. Sankar, "Power reduction in continuous-time Delta-Sigma modulators using the assisted opamp technique", IEEE Journal of Solid State Circuits, July 2010. (paper)


3. K. Reddy and S.Pavan, "A power efficient continuous time Sigma-Delta modulator with 15 MHz bandwidth and 70 dB dynamic range", Analog Integrated Circuits and Signal Processing, June 2010. (paper)


4. S. Pavan, N. Krishnapura, R. Pandarinathan and P. Sankar, ``A Power Optimized Continuous-time Delta-Sigma Modulator for Audio Applications," IEEE Journal of Solid State Circuits, February 2008.(paper)


5. P. Sankar and S. Pavan,``Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta-Sigma Modulators", IEEE Transactions on Circuits and Systems : Express Briefs, December 2007.(paper)


6. K. Reddy and S. Pavan, ``Fundamental Limitations of Continuous-time Delta Sigma Modulators due to Clock Jitter", IEEE Transactions on Circuits and Systems : Regular Papers, October 2007.(paper)


7. V. Srinivas, S. Pavan, A. Lachhwani and N. Sasidhar,`` A Distortion Compensating Flash Analog to Digital Conversion Technique," IEEE Journal of Solid State Circuits. September 2006. (paper)


8. S.Pavan and P.Sankar, "A 110-microwatt Single Bit Audio Continuous-time Oversampled Converter with 92.5 dB Dynamic Range", European Solid State Circuits Conference (ESSCIRC), Athens, Greece, September 2009 (paper).


9. Y.Darhwekar, R.Kumar, D.Sahu, S.Pavan, A.Lacchwani and S.Mukherjee, "A Digitally Assisted Baseband Filter with 9 MHz Bandwidth and 0.3 dB IQ Mismatch for a WLAN Receiver Chain", International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009.(paper)


10. S.Saxena,P.Sankar and S.Pavan, "Automatic Tuning of Time Constants in Single-bit Continuous-time Delta Sigma Modulators",International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 24-27 May 2009. (paper)


11. V.Hareesh, S.Pavan and E.Bhattacharya, "Readout Circuit Design for an EISCAP Biosensor", IEEE Biomedical Circuits and Systems Conference, November 2008.(paper)


12. K. Reddy and S.Pavan, "A 20.7 mW Continuous-Time Delta-Sigma Modulator with 15 MHz Bandwidth and 70dB Dynamic Range", Proceedings of the European Solid State Circuits Conference, Edinburgh, September 2008.(paper)


13. S. Pavan, N. Krishnapura, R. Pandarinathan and Prabu Sankar, "A 90 microwatt 15-bit Continuous-time Sigma Delta ADC for Digital Audio", Proceedings of the European Solid State Circuits Conference, Munich, September 2007.(paper)


14. S. Murali and S. Pavan," Rapid Simulation of Current Steering DACs using Verilog-A," Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2006, San Jose, September 2006.(paper)


15. A. Sharma and S. Pavan,"A Single Inductor Multiple Output Converter with Adaptive Delta Current Mode Control," IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece , May 2006.(paper)


16. K. Reddy and S. Pavan,"Fundamental Limitations of Continuous-time Delta-Sigma Modulators due to Clock Jitter ," IEEE International Symposium on Circuits and Systems, ISCAS 2006, Kos, Greece , May 2006.(paper) (slides)