EE658: VLSI Data Conversion Circuits, Jan.-May 2008
These lectures are available on the web for the benefit of students at IIT Madras and elsewhere. Copyrights to these rest solely with the instructor and IIT Madras. Copying them, publishing them, rehosting them on other servers, or using them for any sort of commercial gain is prohibited.
Instructor : Shanthi Pavan
Familiarity with basic electronics and signal processing (Fourier Transform etc.) is assumed.
At IIT Madras, the prerequisite courses are Analog Circuits, Networks and Systems and Analog and Digital Signal Processing.
Much of the learning is this design course is done through the simulation assignments. You can use the CAD tools available with the Institute to do the assignments. Information about software downloads, intsallation and transistor model files can be found here. For all assignments use the 0.18um TSMC CMOS model parameters and a supply voltage of 1.8 V .
Textbook(s) and References
Listed below are some references. There is also a host of information available on the WWW - especially in application notes
of Analog Devices.
CMOS Data Converters for Communication - M. Gustavsson, J. Wikner, and N. Tan. Kluwer Academic Publishers, 2000.
Here is a link to the review of the book.
Principles of Data Conversion System Design - Behzad Razavi.
The IEEE Journal of Solid State Circuits (JSSC) is the best place to look for information on state of the art data converter implementations. Within the IIT Campus, it can be accessed online through
IEEEXplore
Course Reader
Listed below are links to papers you can read to gain further intuition, or reinforce your knowledge gained in the lectures.
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Chapter 12 in Design of Analog CMOS Integrated Circuits - Behzad Razavi, Tata McGraw Hill Publishers, for a good introduction to switched-capacitor circuits.
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Some Flash ADC Papers
K. Nagaraj, D. A. Martin, M. Wolfe, R. Chattopadhyay, S. Pavan, J. Cancio, and T. R. Viswanathan, “A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit a/d converter in a 0.25-µm digital CMOS process,” IEEE Journal of Solid-State Circuits, vol. 35, pp. 1760 - 1768, December 2000. Discusses bootstrapped sample and hold, interleaved S/H, preamplifiers with offset correction.
C. W. Mangelsdorf, “A 400-
MHz input flash converter with error correction,” IEEE Journal of Solid-State Circuits, vol. 25, pp. 184 - 191, February 1990. Discusses latch design, error correction using majority encoding.
V. Srinivas, S. Pavan, A. Lachhwani and N. Sasidhar, “ A Distortion Compensating Flash Analog to Digital Conversion Technique,” IEEE Journal of Solid State Circuits. September 2006. (
paper)
J. Lin and B. Haroun, “An embedded 0.8 V/480 µW 6B/22
MHz flash ADC in 0.13-µm digital CMOS Process using a nonlinear double interpolation technique,” IEEE Journal of Solid-State Circuits, vol. 37, pp. 1610 - 1617, December 2002.
M. Choi and A. A. Abidi, “A 6-b 1.3-Gsample/s A/D converter in 0.35-µm CMOS,” IEEE Journal of Solid-State Circuits, vol. 36, pp. 1847 - 1858, December 2001.
R. Sarpeshkar, J. Wyatt and N. Lu, “Mismatch sensitivity of a simultaneously latched CMOS sense amplifier”, IEEE Journal of Solid State Circuits, 1991. (
paper) - analysis of dynamic mismatch in a latch.
Papers on Current Steering DACs
Douglas Mercer; “A study of error sources in current steering digital-to-analog converters”, 2004 IEEE Custom Integrated Circuits Conference, May 2004.
Chi-Hung Lin, Klaas Bult; “A 10-b, 500-MSample/s CMOS DAC in 0.6 mm2”, IEEE Journal of Solid-State Circuits, vol. 33, pp. 1948 - 1958, December 1998. An extremely well designed DAC which holds its performance up to the nyquist frequency.
Bernd Schafferer, Richard Adams; “A 3V CMOS 400mW 14b 1.4GS/s DAC for multi-carrier applications”, IEEE International Solid-State Circuits Conference, vol. XVII, pp. 360 - 361, February 2004.
Reading on Delta-Sigma Modulators
Delta-Sigma Data Converters: Theory, Design, and Simulation - by Steven R. Norsworthy, Richard Schreier, Gabor C. Temes (the Yellow Bible of Delta-Sigma Converters)
Understanding Delta-Sigma Data Converters - by Richard Schreier, Gabor C. Temes (the Green Bible of Delta-Sigma Converters)
Theory, Practice, and Fundamental Performance Limits of High-Speed Data Conversion Using Continuous-Time Delta-Sigma Modulators. PhD Dissertation, James A Cherry
Thesis.Excellent discussion of continuous-time delta-sigma conversion.A must read for anybody serious about CTDSMs.
S. Pavan and N. Krishnapura, “Oversampling Analog-to-Digital Converters”, Full Day Tutorial at the International Conference on VLSI Design, January 4-8, Hyderabad, India. (
Lecture and notes)
S. Pavan, N. Krishnapura, R. Pandarinathan and P. Sankar, “A Power Optimized Continuous-time Delta-Sigma Modulator for Audio Applications,”
IEEE Journal of Solid State Circuits, February 2008.
(paper)Detailed discussion of the case study in class.
Assignments must be submitted by Email to ee658.iitm@gmail.com ONLY, as a single PDF file attachment.
The file must be named according to roll number in the
following manner - if your roll number is EE07B007, and you are submitting assignment one, call your file ee07b007_01.pdf
Plagiarism (euphemistically excessive collaboration, really copying) is a serious offence. By submitting assignments you are implicitly agreeing that you have been honest in doing your assignment. If I find out that you have plagiarized, you will accept the penalty I deem fit.
Assignments
Recorded Lectures
Thanks go to the TAs for painstakingly editing the lectures.
You can download the entire set of lectures(1.4GB). The archive contains directories for each day's lecture. It also has an index file 2008-ee658-shanthipavan.html
from which you can access the lectures.
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