team

Sridharan K

Professor

Ph.D  RPI, Troy, New York, 1995

044-2257 4423

sridhara@ee.iitm.ac.in

  • Multi-robot systems.
  • FPGA-based robotics.
  • Digital Design in Emerging Device Technologies.

  • Associate Editor, IEEE Transactions on Industrial Electronics, 2012-2019.
  • Fellow, IETE.
  • Fellow, IE(I).
  • Tan Chin Tuan Fellowship, Singapore, 2011.
  • Hari Om Ashram Prerit Dr Vikram Sarabhai Research Award, 2009.

    Previous Courses

  • Microprocessor Theory + Lab.
  • Advanced Control and Instrumentation.
  • DSP Architectures and Embedded Systems.
  • Basic Electrical Engineering.
  • Control Engineering.
  • Synthesis of Control Systems.

Journals

  • P Nagachandrika, R Sarathi and K Sridharan, Characterization of silicone rubber/MgO nanocomposites for grippers in transmission line inspection robots, IEEE Transactions on Nanotechnology, Vol 21, No 11, 2022, pp 709-719.
  • B Srinivasu and K Sridharan, Low-power and high-performance ternary SRAM designs with application to CNTFET technology, IEEE Transactions on Nanotechnology, Vol 20, No 1, 2021, pp 562-566.
  • Yashrajsinh Parmar and K Sridharan, A Resource-Efficient, Multiplierless Systolic Array Architecture for Convolutions in Deep Networks, IEEE Transactions on Circuits and Systems-II: Express Briefs, Vol 67, No 2, 2020, pp 370-374.
  • Bhaskar Vundurthy and K Sridharan, Protecting an Autonomous Delivery Agent Against a Vision-Guided Adversary: Algorithms and Experimental Results, IEEE Transactions on Industrial Informatics, Dec 2019.
  • Yashrajsinh Parmar and K Sridharan, A Precomputation-based radix-4 CORDIC for approximate rotations and Hough Transform, IET-Circuits, Devices & Systems, Vol 12, Issue 4, 2018, pp 413-423.
  • Vikramkumar Pudi, K Sridharan and F Lombardi, Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity, IEEE Transactions on Computers, Vol 66, No 10, October 2017, pp 1824-1830.
  • B Srinivasu and K Sridharan, A synthesis methodology for ternary logic circuits in emerging device technologies, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol 64, Issue 8, Aug 2017, pp 2146-2159.
  • B Srinivasu and K Sridharan, A transistor-level probabilistic approach for reliability analysis of arithmetic circuits with applications to emerging technologies, IEEE Transactions on Reliability, Vol 66, No 2, June 2017, pp 440-457.
  • P Vyas, L Vachhani, K Sridharan and V Pudi, CORDIC-based Algorithms for Azimuth Calculation and Dynamic Obstacle Tracking Using Optimal Sensor Placement for an FPGA-Driven Robot, IEEE/ASME Transactions on Mechatronics, Vol 21, Issue 5, Oct 2016, pp 2317-2329.
  • T Nou-Shene, K Sridharan and N Sudha, Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot, IEEE Transactions on Industrial Electronics, Vol 63, Issue 8, 2016, pp 5012 - 5021.
  • B Srinivasu and K Sridharan, Low-Complexity Multiternary Digit Multiplier Design in CNTFET Technology, IEEE Transactions on Circuits and Systems--II: Express Briefs, Vol 63, No 8, August 2016, pp 753-757.
  • Vikramkumar Pudi and K Sridharan, A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum Dot Cellular Automata, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol 23, Issue 10, 2015, pp 2352 - 2356.
  • K Sridharan, Sundaraiah Gurindagunta and Vikramkumar Pudi, Efficient Multi-Ternary Digit Adder Design in CNTFET Technology, IEEE Transactions on Nanotechnology, Vol 12, Issue 3, May 2013, pp 283-287.
  • Vikramkumar Pudi and K Sridharan, Low Complexity Design of Ripple Carry and Brent-Kung Adders in QCA, IEEE Transactions on Nanotechnology, Vol 11, No 1, January 2012, pp 105-119.
  • Vikramkumar Pudi and K Sridharan, Efficient design of a hybrid adder in quantum dot cellular automata, IEEE Transactions on VLSI Systems, Vol 19, No 9, 2011, pp 1535-1548.
  • Leena Vachhani, Arun D Mahindrakar and K Sridharan, Mobile Robot Navigation Through a Hardware Efficient Implementation for Control Law Based Construction of Generalized Voronoi Diagram, IEEE/ASME Transactions on Mechatronics, Vol 16, No 6, Dec 2011, pp 1083-1095.
  • P K Meher, Javier Valls, Tso-Bing Juang, K Sridharan and K Maharatna, 50 Years of CORDIC: Algorithms, Architectures and Applications, IEEE Transactions on Circuits and Systems - Part I: Regular Papers, Vol 56, No 9, September 2009, pp 1893-1907.
  • Leena Vachhani, K Sridharan and Pramod K Meher, Efficient CORDIC algorithms and architectures for low area and high throughput implementation, IEEE Transactions on Circuits and Systems - Part II:Express Briefs, Vol 56, No 1, January 2009, pp 61-65.
  • Leena Vachhani and K Sridharan, Hardware-efficient Prediction-Correction Based Generalized Voronoi Diagram Construction and FPGA Implementation, IEEE Transactions on Industrial Electronics, Vol 55, Issue 4, April 2008, pp 1558-1569.
  • P Rajesh Kumar and K Sridharan, VLSI-efficient scheme and FPGA realization for robotic mapping in a dynamic environment, IEEE Transactions on VLSI Systems, Vol 15, No 1, January 2007, pp 118-123.
  • K Sridharan and T K Priya, A Hardware Accelerator and FPGA Realization for Reduced Visibility Graph Construction Using Efficient Bit Representations, IEEE Transactions on Industrial Electronics, Vol 54, Issue 3, June 2007, pp 1800-1804.
  • K Sridharan and T K Priya, The design of a hardware accelerator for real-time complete visibility graph construction and efficient FPGA implementation, IEEE Transactions on Industrial Electronics, Vol 52, No 4, Aug 2005, pp 1185-1187.
  • Lam Siew Kei, K Sridharan and T Srikanthan, Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction, IEEE Transactions on Industrial Electronics, Vol 51, No 6, Dec 2004, pp 1346-1348.
  • K Sridharan, A course on Web languages and Web-based applications, IEEE Transactions on Education, Vol 47, No 2, May 2004, pp 254-260.
  • K Sridharan, Efficient computation of a measure of depth between convex objects for graphics applications, Computers and Graphics, Pergamon, Vol 26, No 5, Oct 2002, pp 785-793.
  • B Rajesh Kumar, K Sridharan and K Srinivasan, The design and development of a Web-based data acquisition system, IEEE Transactions on Instrumentation and Measurement, Vol 51, Issue 3, June 2002, pp 427-432.
  • K Sridharan, Teaching computer graphics and robotics using symbolic computation software, Computer Applications in Engineering Education, John Wiley, Vol 8, Issue 1, May 2000, pp 18-30.
  • K Sridharan, Computing two penetration measures for curved 2D objects, Information Processing Letters, Elsevier, Vol 72/3-4, November 1999, pp 143-148.
  • K Sridharan, H E Stephanou, K C Craig and S S Keerthi, Distance measures on intersecting objects and their applications, Information Processing Letters, Elsevier, Vol 51, Issue 4, August 1994, pp 181-188.
  • S S Keerthi and K Sridharan, Solution of parametrized linear inequalities by Fourier Elimination and its applications, Journal of Optimization Theory and Applications, Plenum, April 1990, pp 161-169.

Books Authored

  • K Sridharan, B Srinivasu and Vikramkumar Pudi, Low-Complexity Arithmetic Circuit Design in Carbon Nanotube Field Effect Transistor Technology, Springer Nature Switzerland, Carbon Nanostructures Series, ISBN 978-3-030-50698-8, August 2020.
  • K Sridharan and Vikramkumar Pudi, Design of Arithmetic Circuits in Quantum Dot Cellular Automata Nanotechnology, Springer International Publishing, Switzerland, Studies in Computational Intelligence Book Series - Vol 599, ISBN 978-3-319-16687-2, April 2015.
  • K Sridharan and Panakala Rajesh Kumar, Robotic Exploration and Landmark Determination - Hardware-Efficient Algorithms and FPGA Implementations, Springer Verlag, Heidelberg, Studies in Computational Intelligence Book Series - Vol 81, ISBN 978-3-540-75393-3, January 2008.

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