Towards power efficient and small form factor mobile devices in future wireless communications

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Name of the Speaker: Dr. Pilsoon Choi
Name of the Organizer: Dr. Deleep Nair
Date/Time: August 25th 2022 at 7:00 PM.

Biography of the Speaker :
Pilsoon Choi (Senior Member, IEEE) received the Ph.D. degree in EECS from KAIST in 2004. While with KAIST, he developed the first IEEE 802.15.4 CMOS radio for low-power wireless sensor network which is now Internet-of-Things (IoTs). From 2004 to 2011, he was with Samsung Electronics Company Ltd., where he developed the first wirel ess codec SoC for real-time HD video streaming and was also involved in international standardization. Since 2012, he has been leading a communication circuit design team of the Low Energy Electronic Systems (LEES) research program. He is currently a Research Scientist with MIT. His research interests include RF signal-processing and energy-processing circuits design in III-V and CMOS technologies.

Affiliation of the Speaker :
Research Scientist, MIT, Cambridge, USA

Abstract :
III-V devices and circuits have been playing an important role in wireless communications while CMOS devices and circuits are required for digital and analog building blocks design. For future mobile applications, III-V will be crucial for the power efficiency of battery-powered devices, high linearity for carrier-aggregated signals, and small form factor of phased-array radios. This webinar starts with system level design issues for RF/mmWave circuits design, introduces LEES monolithic integration process that incorporates III-V HEMTs into standard CMOS integrated circuits in a wafer scale, and presents some III-V + CMOS design examples with outstanding performance that cannot be achieved with CMOS only. III-V HEMTs and their monolithic integration with CMOS circuits will tackle challenging problems in realizing future mobile devices.