Name of the Speaker: Alok Baluni (EE15D043)
Guide: Prof. Shanthi Pavan
Venue/Online meeting link: meet.google.com/kxw-ekzy-quj
Date/Time: 12th August 2022, 12:30 PM
Wireless applications need power efficient wide-band analog-to-digital converters (ADCs) with high dynamic range. A continuous time delta sigma modulator (CTDSM) is attractive in such applications due to its resistive input impedance as well as implicit antialiasing features. Adopting a CTDSM ADC for wide bandwidths necessitates very high sampling rates in order to achieve desired performance targets. This offers challenges in terms of comparator meta-stability which directly affects loop timing closure as well as data dependent jitter. In addition, high frequency operation is accompanied by increased inter symbol interference (ISI) as well as increased power dissipation. Our work aims to analyse these challenges in detail and offer solutions for overcoming the same.