Open-source AMS layout synthesis and hardware architectures for machine learning inference

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Name of the Speaker: Dr. Ramprasath, University of Minnesota
Guide: Dr. Vinita Vasudevan
Venue/Online meeting link: ESB-244 (Seminar Hall)
Date/Time: 17th January 2023 (Tuesday), 2.00 PM

Analog/mixed-signal (AMS) circuits are a crucial component of modern-day integrated circuits whose layouts continue to be handcrafted, unlike their digital counterparts, which have been predominantly automated. This manual effort is one of the leading causes of low design productivity, long design/layout cycles, high development costs, and respins due to failures. Traditionally, AMS layouts generated automatically have been unable to match the performance of handcrafted ones. Advanced process nodes restrict layout geometries and have lesser freedom of choice. Although the number of AMS blocks in designs continues to increase, a significant portion of these requires modest performance. Even for high-performance designs, automated layouts can help reduce design/layout iterations. Recent advances in machine learning help solve the AMS layout generation problem in a manner that was not previously possible. These advances make it amenable for AMS layout automation. This talk will present (a) an open-source automated AMS layout synthesis tool developed from the ground up with these considerations and (b) a specific problem of automatic well-island generation and well-tap insertion.

Ramprasath received B. Tech in Electronics and Communication Engineering from the NIT Trichy in 2009 and PhD in Electrical Engineering from IIT Madras in 2016. He is currently a postdoctoral associate at the University of Minnesota, working on open-source AMS layout synthesis and hardware architectures for machine learning inference. Before this, he was at IBM, Synopsys, and Qualcomm, developing tools and methodologies for automation of back-end-of-line design.