Abstract: Programmable Photonic Integrated Circuits (PPICs) enable reconfigurable linear optical transformations on chip for applications spanning optical signal processing, microwave photonics,quantum information, and neuromorphic computing. By interconnecting tunable Mach–Zehnder in-terferometers (MZIs) in mesh architectures, PPICs realize a universal photonic hardware platform analogous to electronic FPGAs, offering high-bandwidth, low-latency operation. Scaling PPIC meshes to large sizes, however, introduces major challenges. Fabrication-induced phase errors accumulate across the network, requiring robust tap-less calibration without embedded tap monitors. In addition, the growing number of phase shifters increases electrical interconnects and bondpads, which are limited by chip-edge real estate. The power consumption and footprint of individual phase shifters further exacerbate these bottlenecks, hindering large-scale PPIC deployment.

In this seminar, we will present tap-less phase-error correction in PPIC circuits using only input–output measurements and demonstrate applications in microwave photonic filtering and quantum random number generation. To enable scalable control, we will introduce a diode-assisted microheater architecture for selective phase-shifter addressing, reducing bondpad count by half and alleviating chip-edge routing constraints. Finally, we will discuss the design of a low-power MZI-based Multi-Purpose Programmable Photonic (MP3) processor, in which a single large-scale PPIC chip can be reconfigured to implement multiple photonic circuits, functioning as a photonic FPGA. We will also outline a futuristic 3D-MP3 architecture to reduce the footprint.

Event Details
Title: Programmable Photonic Integrated Circuits: Architecture, Control, and Applications
Date: March 11, 2026 at 3:00 PM
Venue: ESB 244
Speaker: Mr. Kumar Piyush (EE19D201)
Guide: Dr. Bijoy Krishna Das
Type: PHD seminar

Updated: