LDPC and Polar Codes in 5G

C fixed-point implementation of codecs for WiSiG networks.

Turbo-like Codes

C fixed-point implementation of a turbo-like code for ORB Analytics, USA.

Implementation of an OFDM Troposcatter Modem

Design and FPGA implementation of an OFDM modem for troposcatter communications for DEAL, Dehradun. This is done jointly with Profs. Radhakrishna Ganti and Nitin Chandrachoodan.

Design of a Link Enhancer

Design of a link enhancer that works at the link layer of an E1 link for BEL, Bangalore.

Codes in Digital Video Broadcast Standards

Assistance with design and implementation of various codes (LDPC/Turbo/BCH etc) that appear in the DVB standards worldwide. This work is for Saankhya Labs, Bangalore.

Layered Decoder for Low Density Parity Check Codes

C fixed-point implementation for layered decoding of a generic LDPC code for ORB Analytics, USA.

Low Density Parity Check Codes for VLF Communications

Design and C implementation of LDPC codes for a very low frequency (VLF) communication system for DEAL, Dehradun, India. Block synchronization at very low SNRs is part of this ongoing project.

Low Density Parity Check Codes for Space Communications

C fixed-point implementation of JPL's AR4JA LDPC codes for ORB Analytics, USA.

Low Density Parity Check Codes for a Wireless OFDM System

Design and C fixed-point implementation of a LDPC code for a wireless OFDM system was completed for Radiospire Inc, Boston, USA. Modifications of the standard CRC-based error detection were proposed and analyzed as part of this consultancy.

Iterative Decoding of Euclidean Geometry Codes

This work was done during doctoral research for Calimetrics Inc, USA.


Several lectures have been delivered in companies and university departments on the areas of basic digital communications, error control coding, turbo codes and LDPC codes. The codes in the leading standards are described as part of the training.


  1. Advanced forward error correction, Granted Patent, United States Patent 6842873, Filed in 2005.
  2. Methods and apparatus for improving error indication performance in systems with low-density parity check codes, Patent Application US20080155372, Filed in 2006.