Integrated Circuits and Systems group, IIT Madras

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 We regularly have openings for students in our research group. If you wish to study here, go through [[forstudents/​start|this page]] for more information and contact the [[people/​start|faculty member]] working in your area of interest. Here is a short video about our group:
 
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 ===== MS/PhD at IIT Madras and GATE 2018 ===== 
  
 A number of MS/PhD positions are available in our group. Bachelors students applying for MS or (direct) PhD require a GATE score. Students who intend to apply to these positions, including those in the final year of their bachelors'​ program, are urged to register for [[http://​www.gate.iitg.ac.in/​|GATE 2018]] in EC/EE/IN. For these research positions, selections are through a test and interview and GATE score is used only for shortlisting for the test and interview. GATE requirement is waived for MS and direct PhD applicants from IITs with CGPA >=8.0. GATE requirement is waived for direct PhD applicants from CFTIs with CGPA > 8.0. See [[http://​www.ee.iitm.ac.in/​2017/​03/​m-s-ph-d-admission-criteria-july-nov-2017/​|this link]] and [[http://​www.ee.iitm.ac.in/​vlsi/​tiiprogram/​start|this link]] for detailed shortlisting criteria used this year. 
 
 ===== News =====
   * AsishDevandla SekharAshutoshKanhaiya KumarChintanM PraneethGauthamNidhin S ThiyagarajIrabanPranav ChaitanyaKishoreRegin Jesudason GRaghavendraShailender Singh, and Venkata Sesha Rao Srikrishnan R have joined ​the ICS our group. A warm welcome to all of them.  
   * Online courses [[https://​onlinecourses.nptel.ac.in/​noc17_ee13/​preview|Basic Electrical Circuits]] and [[https://​onlinecourses.nptel.ac.in/​noc17_ee14/​preview|Analog circuits]] will be run on NPTEL starting 24th July 2017. Click on the respective links to register. Registration deadline is 24th July. 
   * Our recorded lectures will now become available on our [[https://​www.youtube.com/​channel/​UCePMtM40OBXEwoA8aFwkFxg/​playlists|YouTube channel]]. They will continue to be available at [[http://​www.ee.iitm.ac.in/​videolectures|http://​www.ee.iitm.ac.in/​videolectures]].  
   * Anoop Narayan Bhat received the [[http://​www.iesaonline.org/​Technovation2016/​index.html|2016 Technoinventor award]] in the masters category from the [[http://​www.iesaonline.org/​|India Electronics and Semiconductor Association]] at their [[http://​iesaonline.org/​vs2017/​index.html|2017 vision summit]].  
   * The paper  **Optimum Scaling of Stages in a Frequency Divider Chain for Best Jitter FoM** by Sumit Kumar and Nagendra Krishnapura will be presented at the 2017 International Symposium on circuits and Systems to be held in Baltimore, USA in May 2017. 
   * The paper  **On Linear Periodically Time Varying (LPTV) Systems with Modulated Inputs, and Their Application to Smoothing Filters** by Shanthi Pavan will be presented at the 2017 International Symposium on circuits and Systems to be held in Baltimore, USA in May 2017. 
  
 {{:​uds_2ndedition.jpg?​direct&​480|Order it on Amazon}}  
  
 **Understanding Delta-Sigma Data Converters** // Second Edition// \\  Shanthi Pavan, Richard Schreier and Gabor Temes \\  Wiley and IEEE Press Series on Microelectronic Systems \\  
 [[http://​www.amazon.com/​Understanding-Delta-Sigma-Converters-Microelectronic-Systems/​dp/​1119258278|Now available! Order it on Amazon]] ​  
  
   * The paper  **A 500Mb/s, 200pJ/bit die-to-die bidirectional link with 24kV surge isolation and 50kV/s CMR using resonant inductive coupling in 180nm CMOS** by Subhashish Mukherjee, Anoop Narayan Bhat, Kumar Anurag Shrivastava,​ Madhulatha Bonu, Benjamin Sutton, Jhankar Malakar, and Nagendra Krishnapura will be presented at the 2017 International Solid-State Circuits Conference to be held in San Francisco, USA in Feb. 2017. 
   * The paper **A Low Power Multi-Channel Input Delta-Sigma ADC Without Reset** by Ashwin Kumar R. S., Debasish Behera, and Nagendra Krishnapura was presented at the 2017 VLSI Design Conference held in Hyderabad in Jan. 2017. 
 
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