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start [2020/08/26 05:16] nagendra |
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start [2026/02/24 01:16] (current) nagendra |
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| Our [[people/start|faculty]] and students are involved in research in the areas of analog, mixed signal, and RF design, analysis and simulation of noise in circuits, VLSI DSP architectures, and reconfigurable computing. Click on the tabs above to find out more about us and our research. |
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| ===== Applications to 2026 July PhD/MS interviews ===== |
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| Applications to the regular PhD/MS programs are now open. The deadline is **30 March 2026**. See links below for more information. |
| * https://research.iitm.ac.in/ : Applicants to all programs must fill out the application form here |
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| We regularly have openings for students in our research group. If you wish to study here, go through [[forstudents/start|this page]] for more information and contact the [[people/start|faculty member]] working in your area of interest. Here is a short video about our group: |
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<html><center><iframe width="560" height="315" src="https://www.youtube.com/embed/wAZWBAM6-Ts" frameborder="0" allowfullscreen></iframe></center></html> |
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| ===== News ===== |
* AnkitDr. Raveesh Magod joined our group as a faculty member. He is a specialist in power management ICs and has extensive industrial experience at Texas Instruments Dallas. A warm welcome to him! |
* Devandla Sekhar, ArkaprabhaKanhaiya Kumar, ChetnaM Praneeth, Jeffry GeorgeNidhin S Thiyagaraj, ManojPranav Chaitanya, MeghnaRegin Jesudason G, Para Brahmachari, Neel, Nilanjan, Nishanth, Paramita, Ravi Teja, Abhinav, Rohan, Sattiwk, Shivam, Shubham, Snigdha, Sumanth, Tavesh, Utkarsh, VaibhavShailender Singh, and Vivek Srikrishnan R have a joined our research group. A warm welcome to all of them! |
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* The paper **A 20 MHz Bandwidth Continuous-Time Delta-Sigma ADC Achieving 82. 1 dB SNDR and >100 dB SFDR Using a Time-Interleaved Virtual-Ground-Switched FIR Feedback DAC** by Alok Baluni and Shanthi Pavan was presented at the IEEE Custom Integrated Circuits Conference in Mar. 2020. This paper won the **outstanding student paper award** at the conference, and will be presented at the plenary at CICC 2021. Congratulations Alok! |
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* The paper **An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter** by Hajime Shibata,..., and Shanthi Pavan was presented at the 2020 IEEE International Solid State Circuits Conference in San Francisco in Feb. 2020. |
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* [[http://www.ee.iitm.ac.in/vlsi/_detail/iscas2020papers.png|11 papers]] from the group have been accepted for presentation at the 2020 International Symposium on Circuits and Systems to be held in Seville, Spain in May 2020. Congratulations to all authors. |
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