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start [2016/03/22 20:12] nagendra |
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start [2025/10/18 10:16] (current) nagendra |
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====== VLSI Integrated Circuits and Systems group, IIT Madras ====== |
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Welcome to the homepage of the VLSI Integrated Circuits and Systems group in the [[http://www.ee.iitm.ac.in/|Department of Electrical Engineering]] at [[http://www.iitm.ac.in/|IIT Madras]]. We are located in a beautiful wooded campus in southern Chennai. |
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| Our [[people/start|faculty]] and students are involved in research in the areas of analog, mixed signal, and RF design, analysis and simulation of noise in circuits, VLSI DSP architectures, and reconfigurable computing. Click on the tabs above to find out more about us and our research. |
rogrammable Analog Pulse Shaping for Ultra-Wideband Applications |
We regularly have openings for students in our research group. If you wish to study here, go through [[forstudents/start|this page]] for more information and contact the [[people/start|faculty member]] working in your area of interest. |
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===== 2016 Texas Instruments Research Associateships at IIT Madras Applications to 2026 January PhD/MS interviews ===== |
* Applications to the [[http://www.ee.iitm.ac.in/vlsi/tiiprogram/start|Texas Instruments research associateship program]] leading to an MS degree at IIT Madras will open between 19<sup>th</sup> and 24<sup>th</sup> March 2016. Information about this program can be found at [[http://www.ee.iitm.ac.in/vlsi/tiiprogram/start|this link]]. |
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===== News =====Applications to the regular PhD/MS programs are now open. The deadline is **31 October 2025**. See links below for more information. |
* Drhttps://research.Saurabh Saxena has joined our facultyiitm.He has a PhD from the University of Illinois, Urbana Champaignac.He works in/ : Applicants to all programs must fill out the area of high speed serial links. Welcome Saurabh!application form here |
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* The paper **A 280μW 24kHz-BW 98.5dB-SNDR Chopped Single-Bit CT ΔΣM Achieving <10Hz 1/f Noise Corner Without Chopping Artifacts** by Sujith Billa, Amrith Sukumaran, and Shanthi Pavan will be presented at the International Solid State Circuits Conference to be held We regularly have openings for students in San Francisco, USA in Febour research group. 2016. |
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* The paper **A Tail-Resonance Calibration Technique for Wide Tuning Range LC VCOs** by Abhishek Bhat and Nagendra Krishnapura will be presented at the International Symposium on Circuits and Systems If you wish to be held in Montrealstudy here, Canada in May 2016. |
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* The paper **A Compact Dual-Band 5dBm RF Power Amplifier go through [[forstudents/start|this page]] for Cellular Applications** by Aparna Girija more information and S. Aniruddhan will be presented at contact the International Symposium on Circuits and Systems to be held in Montreal, Canada in May 2016. |
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* The paper **Continuous-Time Delta Sigma Modulators with Dual Switched Capacitor Resistor DACs** by Shanthi Pavan will be presented at the International Symposium on Circuits and Systems to be held in Montreal, Canada [[people/start|faculty member]] working in May 2016your area of interest. Here is a short video about our group: |
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| <html><iframe width="560" height="315" src="https://www.youtube.com/embed/wAZWBAM6-Ts" frameborder="0" allowfullscreen></iframe></html> |
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| ===== News ===== |
| * Devandla Sekhar, Kanhaiya Kumar, M Praneeth, Nidhin S Thiyagaraj, Pranav Chaitanya, Regin Jesudason G, Shailender Singh, and Srikrishnan R have joined our group. A warm welcome to all of them. |
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| ([[newsarchives|Archive]]) |