EE2003: Computer Organisation

* Janakiraman Viraraghavan (IITM)

• Tutorial: 10%
• Quiz 1: 15%
• Quiz 2: 15%
• End Semester Exam: 60%

• Digital Design and Computer Architecture, Second Edition, by David Money Harris and Sarah Harris.MK Publishers

(What the students should be able to do after the course)

• Translate simple C programs to assembly language (x86).
• Explain the need for a prologue and epilogue in function translations in C
• Explain how and where local variable are stored and accessed in a C program
• Demonstrate the constraints imposed by memory alignment on a C program
• Build a single cycle RISC-V processor
• Add instructions to a single cycle RISC-V processor
• Design the FSM for a multi cycle processor
• Construct a pipelined processor
• Explain the concept of register forwarding
• Fix data and control hazards in a pipelined processor
• Estimate the maximum clock frequency for each type of processor
• Explain direct mapped and associative caches
• Analyse and explain various misses in a cache

• The digital computer
• The x86 instruction (sub)set
• Processor and memory

• Compiling, linking, and executing C programs
• Local variables and the stack
• Function calls, prologue, and epilogue
• Function arguments
• Memory alignment
• Variable argument list functions - printf
• Recursion

• Review of digital systems
• Static timing analysis
• Register file construction
• Read after write in a register file
• Pipelined systems timing constraints

• RISC-V instruction set
• Classification of instructions
• Single cycle processor data path
• Single cycle processor control path
• Single cycle performance
• Adding new instructions
• Multi cycle processor design
• Multicycle processor performance
• Pipelined processor design
• Data and control hazards
• Pipelined processor performance
• Super scalar processor

• Memory hierarchy
• Cache memory
• Direct mapped caches
• Associative caches
• Data miss categories
• Introduction to virtual memory