====== EE6331: Embedded Memory Design (Jan 2021) ======


===== Instructors =====
  * [[http://www.ee.iitm.ac.in/~janakiraman/|Janakiraman Viraraghavan]] (IITM)
  * Dr. Rahul Rao (STSM IBM. India. Pvt. Ltd, Adjunct Faculty IITM)

===== Classroom =====
Online - Flipped Classroom Mode

===== Schedule =====
Live session: S-slot - Thu (2:00 - 3:00 PM)

===== Evaluation =====
  * Weekly Quiz: 20%
  * Mid Term: 30%
  * Project : 20%
  * End Semester Exam: 30%

===== Course Objective =====
(Why we teach this course?)
  *  Introduce students to some relevant advanced topics of current interest in academia and industry
  *  Give the students a feel for research topics
  *  Make students aware of work happening in industries, specifically in India
This course will cover three broad subjects:
  - SRAM design (Rahul Rao)
  - Embedded DRAM design (Janakiraman)
  - Non-Volatile Memories (Janakiraman)

===== Learning Objectives =====
(What the students should be able to do after the course)

==== Part 1- eDRAM Design and Yield Analysis ==== 
  *  Explain the working of a(n) (e)DRAM and what Embedded means?
  *  Explain the working of a feedback sense amplifier and modify existing designs to improve performance
  *  Calculate the voltage levels of operation of various components for an eDRAM
  *  Introduce stacked protect devices to reduce voltage stress of the WL driver

==== Part 2- SRAM Design ====    
  * Articulate memory hierarchy and the value proposition of SRAMs in the memory chain + utilization in current processors
  *  Explain SRAM building blocks and peripheral operations and memory architecture (with physical arrangement)
  *  Articulate commonly used SRAM cells (6T vs 8T), their advantages and disadvantages
  *  Explain the operation of a non-conventional SRAM cells, and their limitations
  *  Explain commonly used assist methods
  *  Explain how variations impact memory cells


===== Week 1  =====
  * Basics of DRAM
  * Definition of Embedded
  * Requirement for short BLs in DRAMs
  * Transfer ratio 
  * Retention time/ Refresh rate analysis
  * Power supplies required for eDRAM
  * Advantages of eDRAM over eSRAM

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/ee6361-eDRAM-L1.pdf|Lecture Slides]]

===== Week 2  =====
  * Write time calculation
  * Hierarchical sensing
  * 3T Micro Sense Amp
  * 3T Micro Sense Amp Noise Analysis

Barth, J. et al., “A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 43, NO. 1, JANUARY 2008. [[http://ieeexplore.ieee.org/document/4443182/|PDF]]

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/ee6361-eDRAM-L2.pdf|Lecture Slides]]

===== Week 3  =====
  * 3T Micro Sense Amp - Evolution
  * 3T Micro Sense Amp - GSA
  * 3T Micro Sense Amp - DSA
  * Read Time Analysis
  * SOI Technology Problems

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/ee6361-eDRAM-L3.pdf|Lecture Slides]]

===== Week 4 =====
Gated Feedback Sense Amplifier 
  * Construction
  * Read and Refresh
  * Read Data Mux
  * Write 

G. Fredeman et al., "A 14 nm 1.1 Mb Embedded DRAM Macro With 1 ns Access," in IEEE Journal of Solid-State Circuits, vol. 51, no. 1, pp. 230-239, Jan. 2016.
doi: 10.1109/JSSC.2015.2456873 [[https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7210238|PDF]]

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/ee6361-eDRAM-L4.pdf|Lecture Slides]]

===== Week 5  =====
  * Variability study
  * Thick Oxide Word-line drivers
  * Thin Oxide Word-line drivers
  * Memory Testing

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/EE6361-eDRAM-Janakiraman-2020.pdf|Consolidated Lecture Slides]]

===== Week 6  =====
  * Introduction to Non-Volatile Memory
  * Charge Trap Transistors
  * Multi Time Programmable CTT
  * Circuit Design Details

===== Week 7  =====
  * Memory hierarchy 
  * Memory organization
  * Flip flop
  * 6T SRAM basics

===== Week 8 =====
  * 6T SRAM cell
  * Static/ Read and Write noise margins
  * Read/ Write/ Hold and Access failures

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200124_IITM_C1.pdf|Lecture Slides]]

===== Week 9 =====
  * Memory Arrangement
  * Alternative Cell Types
  * Column interleaving
  * Memory Folding

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200131_IITM_C2.pdf|Lecture Slides]]

===== Week 10 =====
  * 8T SRAM Cell
  * Multi-port SRAM
  * Variations
  * Redundancy

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200207_IITM_C3.pdf|Lecture Slides]]

===== Week 11 =====
  * Redundancy
  * Assist Circuits
  * Multi VCC SRAM cells
  * Bias Temperature Instability

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200214_IITM_C4.pdf|Lecture Slides]]

===== Week 12 =====
  * BTI Failure
  * Hot Carrier Injection 
  * Power
  * Fault Testing

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200221_IITM_C5.pdf|Lecture Slides]]

===== Week 13 =====
  * Variation Characterization
  * Array-Based IV characterization
  * Digital Characterization

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200228_IITM_C6.pdf|Lecture Slides]]


===== Week 14 =====
  * Variation Characterization
  * Critical Path Monitor
  * SRAM Fluctuation Monitor

[[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2020/material/20200306_IITM_C7.pdf|Lecture Slides]]