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This is an introductory course on Analog Circuits. Familiarity with basic linear electrical networks is assumed. At IIT Madras, the prerequisite courses are Electrical and Magnetic Circuits and Networks and Systems.

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1. 2008-07-29: Introduction to the course
2. 2008-07-30: Linearity; Nonlinear systems and introduction to incremental analysis
3. 2008-07-31: Small signal incremental equivalent circuits
4. 2008-08-01: Small signal incremental equivalent circuits
5. 2008-08-05: Incremental equivalents of common one port elements; Nonlinear two port networks
6. 2008-08-06: Incremental two port parameters; Constraints on incremental y-parameters to realize high gain amplifiers
7. 2008-08-07: Large signal characteristics of a "good" amplifier device; MOS transistor and its characteristics
8. 2008-08-08: MOS transistor characteristics; Realizing the MOS transistor amplifier
9. 2008-08-13: Quiz I and miscellaneous discussions; MOS transistor equations and terminology
10. 2008-08-14: MOS common source amplifier; Biasing; Decoupling capacitors
11. 2008-08-19: Swing limits
12. 2008-08-20: Swing limits (no recording-refer to last year's lectures here and here)
13. 2008-08-21: Swing limits revisited
14. 2008-08-22: ac coupling capacitors; Gain sensitivity to bias; Constant current biasing
15. 2008-08-27: Common source amplifier with a constant current bias
16. 2008-08-28: Biasing a common source amplifier with a drain feedback resistor
17. 2008-08-29: Biasing a common source amplifier current source at the source terminal
18. 2008-09-02: Introduction to negative feedback (no recording-refer to last year's lecture here)
19. 2008-09-03: More on negative feedback; Using an opamp to realize VCVS and CCVS (no recording-refer to last year's lecture here)
20. 2008-09-04: Negative feedback systems; opamp circuits; CCVS using an opamp
21. 2008-09-05: Biasing techniques cont'd-Using a resistor at the source; sensing at the drain and feeding to the source
22. 2008-09-09: Quiz 3; Realizing current sources; Channel length modulation; VCVS using a transistor
23. 2008-09-10: Realizing a VCVS-the common drain amplifier
24. 2008-09-11: Realizing a VCCS using the MOS transistor
25. 2008-09-16: Realizing a CCCS-The common gate amplifier
26. 2008-09-17: Realizing a CCVS-The drain feedback amplifier
27. 2008-09-18: CCVS summary; Introduction to the pMOS transistor
28. 2008-09-19: pMOS equations and small signal equivalent circuit; pMOS common source amplifier; biasing a pMOS transistor at a constant current
29. 2008-09-24: Quiz4; pMOS VCVS
30. 2008-09-25: pMOS VCCS, CCCS, CCVS
31. 2008-09-26: Active load, CMOS inverter
32. • 2008-09-30: Inverter large signal characteristics
    • 2008-09-30: CMOS inverter self biasing; use as a transconductor
33. 2008-10-08: Introduction to bipolar junction transistors
34. 2008-10-10: NPN, PNP large and small signal models; Thermal runaway
35. • 2008-10-14: Bipolar transistor biasing; common emitter amplifier; VCVS
    • 2008-10-14: Quiz 5 discussion
36. 2008-10-15: Bipolar transistor VCVS, VCCS, bootstrapping
37. 2008-10-16: CCCS and CCVS using BJTs
38. 2008-10-17: High frequency transistor model; frequency response of amplifiers
39. 2008-10-22: Common source amplifier frequency response
40. 2008-10-23: Common source amplifier, Common gate amplifier frequency response
41. 2008-10-24: Common Drain amplifier frequency response, input, and output impedances; Colpitts oscillator
42. 2008-10-24: Differential and common mode signals and half circuits; Differential pair
43. 2008-10-29: Differential pair-small signal analysis, CMRR
44. 2008-10-30: Differential pair with current mirror load
    • See this lecture from EE539 for a discussion of the output resistance of a differential pair with a current mirror load
45. • 2008-11-01: Single stage opamp-common mode and output voltage limits
    • 2008-11-01: Feedback amplifiers using a single stage opamp
    • 2008-11-01: Two stage opamp
46. 2008-11-04: Stability of negative feedback systems-1st, 2nd, and 3rd order amplifiers in a feedback loop
47. 2008-11-05: Stability of negative feedback systems; second order system with damped step response; Stability criteria based on loop gain magnitude and phase plots
48. 2008-11-06: Dominant pole compensation; pole splitting compensation
49. 2008-11-07: Two stage amplifier compensation; calculating the miller compensation capacitance(no recording; see this lecture from the tutorial at the 2009 International conference on VLSI design)
50. 2008-11-11: Two stage opamp compensation; internal dc bias of the opamp; importance of dc negative feedback
51. 2008-11-12: Inverting and noninverting amplifiers using an opamp; MOS opamp
52. 2008-11-14: MOS opamp