My main areas of interest are VLSI / FPGA implementations of DSP systems. A related field is CAD tools for automatic design space exploration for such systems.
Students whom I have guided for their graduate research work.
A more detailed Curriculum Vitae is available.
Seetal Potluri, Nitin Chandrachoodan and Kamakoti Veezhinathan, “Post-Synthesis Circuit Techniques for Runtime Leakage Reduction”, International Symposium on
VLSI, Jul 2011
Manish Kumar Jaiswal and N. Chandrachoodan, “
FPGA Based High Performance and Scalable Block LU Decomposition Architecture”,
IEEE Transactions on Computers, accepted for publication, Feb 2011.
Manish Kumar Jaiswal and N. Chandrachoodan, “Efficient Implementation of Floating-Point Reciprocator on
FPGA”, 22nd International Conference on
VLSI Design, 2009, vol., no., pp.267-271, 5-9 Jan. 2009
Manish Kumar Jaiswal and N. Chandrachoodan, “Efficient Implementation of
IEEE Double Precision Floating-Point Multiplier on
FPGA,”
IEEE Region 10 and the Third international Conference on Industrial and Information Systems, 2008. ICIIS 2008. , vol., no., pp.1-4, 8-10 Dec. 2008
A. Kokrady, C. P. Ravikumar and N. Chandrachoodan, “Layout-Aware and Programmable Memory BIST Synthesis for Nanoscale System-on-Chip Designs”, Asian Test Symposium, 2008. ATS '08. 17th , vol., no., pp.351-356, 24-27 Nov. 2008
A. Kokrady, C. P. Ravikumar and N. Chandrachoodan, “Memory Yield Improvement through Multiple Test Sequences and Application aware Fault Models”,
21st International Conference on VLSI Design, VLSI 2008, Hyderabad, India, January 2008.
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Ponnmozhi S. and Nitin Chandrachoodan, “Design of Hardware Coprocessor for OTDR Application”, 11th
IEEE VLSI Design and Test Symposium,
VDAT 2006, Goa, India, August 2006.
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A. Raghupathy, N. Chandrachoodan and K. J. R. Liu, “Algorithm and
VLSI architecture for high performance adaptive video scaling”,
IEEE Transactions on Multimedia, 5(4):489-502, Dec 2003.
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N. Chandrachoodan, S. S. Bhattacharyya, and K. J. R. Liu.
"The hierarchical timing pair model.", In Proceedings of the International Symposium on Circuits and Systems, pages V-367-V-370, Sydney, Australia, May 2001.
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