Research

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Device Modeling and Simulation

We believe modeling is an art and have shown that an assembly of analogical reasoning, geometrical interpretation, and interpolation techniques yields physically meaningful, analytical and compact models. We have also demonstrated how numerical 2-D / 3-D semiconductor device simulators can be used to assess novel device concepts, gain insights into physical phenomena and develop analytical models. Some of our key contributions have been

  • Analytical modeling and simulation of nanoscale junctions and FETs
  • Analytical modeling and simulation of SiC power MOSFETs
  • Solar cell modeling and parameter extraction
  • Analytical models for frequency dependent current spreading in PN junctions
  • Calculation of energy bands of nanostructures
  • A mechanism for the large reverse gate leakage of AlGaN / GaN HEMTs
  • Improvement in the breakdown voltage of superjunctions using the uniform depletion effect of oxide fixed charges
  • Unified Closed-form model of thermionic-field and field emissions through a triangular barrier
  • The design of Field plated HEMTs including novel structures for improved breakdown voltage
  • A compact model for the spreading and coupling resistances between rectangular and circular contacts
  • Equivalent box representation of the non-uniform channel doping in MOSFETs
  • Parameter Extraction of a High Frequency BJT from Simple measurements on Finished Devices

 

Prof. Karmalkar has been invited by different reputed semiconductor research groups in India and the US to bring up their simulation and modeling activity.

Experimental Investigations on Processes in Semiconductor Technology


Electrochemical metallization processes have been investigated leading to the development of the following :

  • Selective plating of N-type and P-type areas on a silicon surface by pulse electroplating
  • A new solution to activate polished silicon surfaces for obtaining adherant electroless plating
  • New insights into palladium activation and electroless plating mechanisms
  • An all-plated process for bump metallization of silicon

 

The work on activation and electroless plating has attracted the attention of other researchers who have subsequently shown the utility of the new solution in deposition of palladium nano-particles. The work was also presented as an invited talk in the Spring 2006 meeting of International Society of Electrochemistry in Singapore.

Indigenous Development of Imported Devices


We have undertaken projects requiring comprehensive application of engineering principles to practical problems. One such venture involved indigenous development of the technology of the imported axial lead glass packaged high-Q VHF-UHF tuning diodes. This initiative, undertaken by Prof. Karmalkar on loss of pay leave from the institute, was one of the factors which encouraged IIT Madras to amend its leave rules by including a paid leave for entrepreneurial efforts. It also provided an opportunity to work in different laboratories, industries and institutions of the country in what could be termed as a "technology pilgrimage". Subsequently, we have actively pursued indigenous development of imported semiconductor products in collaboration with industries. A manufacturing process for KSC 1393 Tuner transistor used in high frequency tuning applications has been developed and put into production, as a part of a consultancy project granted by Bharat Electronics Ltd, (BEL) Bangalore. Encouraged by this success, BEL has entered into a bigger consultancy project for developing power MOSFETs.

MEMS / Microfluidics / Nanotechnology

An active, normally-closed piezoelectric microvalve useful for automated drug delivery or control of fluids in microreactor systems has been fabricated. The microvalve has dimensions of 19 x 19 x 7 mm, an inlet diameter of 200 um, a dead volume of 0.33 ul and has a steady-state flow-rate of about 240 sccm. It is controlled by voltages in the range of 100-300 V.

A systematic method for moulding microchannels in PDMS without using complicated systems or costly materials has been developed. Several experiments have been conducted on DNA separation in PDMS channels. The sample volume was 5 ul in early experiments but could be reduced to only 0.5 ul of the sample, by gaining insight into important factors to be considered while designing a micro-electrophoresis system.

Formation of protein gradient on PDMS using silicon microchannels of 10 mm - 30 mm length and 15 um - 500 um width terminating in pits of 0.25 cm2 - 1 cm2 area has been studied. The PDMS substrates were placed on the microchannels, through which a protein solution was made to flow by capillary action after injection into the filling pit. The protein gradient detected on PDMS substrate showed that channels with smaller width and depth and are necessary to form stronger gradients over shorter channel length.

Education

New treatments have been developed to teach difficult semiconductor concepts in the classroom. These treatments aim at enhancing the student's comfort level and theory building capabilities. Some of our key contributions published in IEEE Trans. Education are

  • Appealing analogies to illustrate
    • the quantum mechanical nature of carrier scattering
    • the difference between quasi-static and rigorous approaches to junction capacitance calculation
  • A unified perspective to
    • drift, diffusion and thermoelectric currents
    • depletion and diffusion capacitances
  • An effective and efficient introduction to semiconductor device modelling

 

Our research on education also shows how proper introduction of a topic with carefully chosen illustrations and mnemonics can improve the teaching-learning process and how such improvements can be assessed.

© Karmalkar, 20 Jan 2016