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S. Aniruddhan

Aniruddhan

Biosketch

I am a Professor in the VLSI group of the department of Electrical Engineering at Indian Institute of Technology Madras. My students work broadly in the area of Analog IC design, with specific focus on RFIC design.

I obtained a B. Tech. degree in Electrical Engineering from IIT Madras in 2000, and a Ph.D. degree from the University of Washington, Seattle in 2006. Between 2006 and 2011, I worked in the RF-Analog group at Qualcomm Inc., San Diego where I designed integrated circuits for Cellular RF applications.


Contact Details:

Office : ESB 246A
Department of Electrical Engineering
Indian Institute of Technology Madras
Chennai, 600 036, India
Phone : +91-44-2257-4468
e-mail : ani AT ee*iitm*ac*in

Research:

My research primarily focusses on CMOS RF Integrated Circuits for Wireless Communications and Phase-locked loops. However, I am also interested in circuits and systems for biomedical instrumentation and power management.

Some recent publications are here.


Teaching (present semester)

Aug-Nov 2017: EE3002 - Analog Circuits

Aug-Dec 2017 (Video Lectures): EE5310 - Analog Electronic Circuits


Lectures and Videos from past semesters

Jan-May 2015: EE1001 - Electrical and Magnetic Circuits

Jul-Nov 2014: EE5310 - Analog Electronic Circuits; video and notes for this course are available here: Video

Jan-May 2014: EC5190 - Analog IC Design

Jul-Nov 2013: EE6240 - RF Integrated Circuits

Jan-Apr 2013: EE5390 - Analog IC Design

Jul-Nov 2012: EC5135 - Analog Electronic Circuits: Primary course website     Lectures notes and video only

Jan-Apr 2012: EE5390 - Analog IC Design

Aug-Nov 2011: EE6240 - RF Integrated Circuits


Information for Prospective students:

If you are interested in pursuing an MS or PhD in RFIC design at IIT Madras, send me an e-mail. Interviews for our MS and PhD research programs are held twice a year. A brief description of the VLSI programs can be found here. Details of the entrance test, and procedures and requirements for application can be found here and here.

    © 2014 S. Aniruddhan, IIT Madras