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| ====== About SMDP ====== | ====== About SMDP ====== | ||
| - | The Special manpower development program in VLSI and related areas (SMDP), was started by | + | The Special manpower development program in VLSI and related areas (SMDP), was started by the Department of Information Technology (DIT), Government of India, in 1998 to meet the growing manpower needs of the VLSI Industry in India. Under this program, state-of-the-art design tools were procured centrally and distributed to several institutes, including the IITs and NITs. The institutes are classified into Resource centres (RCs) and the participating institutes (PIs). Currently, we are in the third phase of the project, titled **Chips to Systems Development(C2SD)**. The following institutions are part of the IIT Madras cluster. These institutions, together with IITM, are involved in several system and chip designs. Under this program, DIT also funds Tool training programs, Instruction enhancement programs (IEPs), and fabrication of ICs through the Semiconductor Laboratory(SCL), Mohali and other fabrication foundries. |
| - | the Department of Information Technology (DIT), Government of India, in 1998 to meet the growing | + | * IIITDM Kanchipuram |
| - | manpower needs of the VLSI Industry in India. Under this program, state-of-the-art design tools | + | * NIELIT Calicut |
| - | were procured centrally and distributed to several institutes, including the IITs and NITs. The | + | * NIT Calicut |
| - | institutes are classified into Resource centres (RCs) and the participating institutes (PIs). | + | * NIT Puducherry |
| - | Each RC has a few PIs associated with it. IITM is an RC and NIT Trichy, NIT Warangal and NIT Calicut are associated with us. | + | * NIT Silchar |
| + | * NIT Tiruchirappalli | ||
| - | Under this program, DIT also funds Tool training programs, Instruction enhancement programs (IEPs) and the India chip program, under which fabrication costs for some selected ICs are covered. | + | Links: |
| + | * [[http://smdpc2sd.gov.in/| SMDP-C2SD]] | ||
| + | * http://www.smdp2vlsi.gov.in|SMDP phase II]] | ||
| - | For more information on this program, visit the [[http://www.smdp2vlsi.gov.in|SMDPII website at DIT]] | + | ====== IEPs and other courses conducted ====== |
| + | ===== SMDP-C2SD ===== | ||
| + | * [[https://drive.google.com/open?id=1kbWdlBgGF_z4WB30hZ2uDbp2WlSSiK7_|IEP on Analog IC Design]]: 29th January to 2nd February 2018 | ||
| + | The following courses related to SMDP-C2SD topics were conducted under the [[http://www.gian.iitkgp.ac.in/|GIAN]] program. | ||
| + | * **Integrated Phase and Frequency Synthesis** by Sudhakar Pamarti(University of California at Los Angeles, USA), 1st to 15th March 2017. | ||
| + | * **Computational Techniques for Frequency-domain and Perturbation Analysis of Electronic and Multi-Physics Systems** by Prof. Jaijeet Roychowdhury(University of California, Berkeley, USA). 30th Jan. to 3rd Feb. 2017 . | ||
| + | * **Fundamentals of Numerical Modelling and Simulation of Multi-Physics and Multi-Domain Systems** by Prof. Alper Demir(Koc University, Turkey). 2-6 Jan. 2017. | ||
| + | * **Near/sub-threshold circuits and architectures for microprocessors** by Prof. Mingoo Seok(Columbia University, USA). 9-13 Jan. 2017. | ||
| + | * **Advances in Flexible CMOS Radio Frequency Transceivers** by Prof. Eric Klumperink(University of Twente, the Netherlands). 12-16 Nov. 2016. | ||
| + | * **Designing Smart Sensor Systems** by Prof. Kofi Makinwa(Technical University of Delft, the Netherlands). 21-25 Nov. 2016. | ||
| + | ===== SMDP Phase II ===== | ||
| + | * International Guest Faculty workshop on [[http://www.ee.iitm.ac.in/vlsi/_media/iep/klumperink/klumperink-abstracts.pdf?id=start&cache=cache|High performance advanced RF circuits]], 2012. | ||
| + | * [[:iep2010:start|IEP on Mapping DSP algorithms to architectures]], 2010. | ||
| + | * [[:iep:start|IEP on RF circuit design]], 2006. | ||
| - | ====== IEP conducted ====== | + | In SMDP Phase II, using funds from the India chip program, we have fabricated a pipelined A/D converter. It was |
| - | + | ||
| - | * [[:iep:start|IEP on RF circuit design]], 2006 | + | |
| - | * [[:iep2010:start|IEP on Mapping DSP algorithms to architectures]], 2010 | + | |
| - | + | ||
| - | ====== India Chip Program ====== | + | |
| - | + | ||
| - | Using funds from the India chip program, we have fabricated a pipelined A/D converter. It was | + | |
| designed by I.Rajesh, an M.S student, guided by Dr.Y.Shanthi Pavan. {{:iep:thesis.pdf|Thesis.pdf}} | designed by I.Rajesh, an M.S student, guided by Dr.Y.Shanthi Pavan. {{:iep:thesis.pdf|Thesis.pdf}} | ||
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| ====== Other Lecture material ====== | ====== Other Lecture material ====== | ||
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| [[:teaching:start|Recorded Lectures]] | [[:teaching:start|Recorded Lectures]] | ||
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| - | ====== Participating Institutes ====== | ||
| - | * [[http://www.nitc.ac.in/nitc/dept/ece/public_html| NIT Calicut]] | ||
| - | * [[http://www.nitt.edu/home/academics/departments/ece/| NIT Tiruchirapalli]] | ||
| - | * [[http://www.nitw.ac.in/nitwnew/displayDepartPage.aspx?didno=6|NIT Warangal]] | ||