M. Bansal, M. McGowan, I. Mirea, Q. Khan, T. Stockstad, B. Walker, T. Sutton, Current measurments in switching regulators, US 9,755,518, September 5, 2017.
M. Bansal, Q. Khan, C. Shi, Average current mode control of multi-phase switching power converters, US 9,442,140, Sep. 13, 2016.
Q. Khan, S. Dhar, J. Zazzera, T. Sutton, Circuits and Methods for Driving Resonant Actuators, US 9,344,022, May 17, 2016.
Davinder Aggarwal, Vibhor Jain, Janakiraman VIRARAGHAVAN, “Automated design rule checking (DRC) test case generation”, US 8,875,064, Oct 28, 2014.
Davinder Aggarwal, Vaibhav A. RUPARELIA, Neha Singh, Janakiraman VIRARAGHAVAN, “Generic design rule checking (DRC) test case extraction”, US 9,292,652, Mar 22 2016.
C. Narathong and S. Aniruddhan, “Multi-mode Configurable Transmitter Circuit”, US 8,099,127, Jan. 17, 2012.
C. Narathong, S. Aniruddhan and W. Su, “Amplifier with Gain Expansion Stage”, US 8,035,443, Oct. 11, 2011.
B. Sun, S. Aniruddhan and S. Sridhara, “Method and Apparatus for Divider Unit Synchronization”, US 7,965,111, Jun. 25, 2011.
S. Aniruddhan, B. Sun, A. Jayaraman and G.S. Sahota, “Mixer with High Output Power Accuracy and Low Local Oscillator Leakage”, US 7,941,115, May 10, 2011.
C. Narathong and S. Aniruddhan, “Techniques for improving Balun Loaded-Q”, US 7,863,986, Jan. 4, 2011.
Q. Khan, S. Wadhwa, D. Tripathi, G.K. Sidhartha, K. Misri, PVT Variation Detection and Compensation Circuit, US 7495465, Feb. 24, 2009.
D. Tripathi, G.K. Sidhartha, Q. Khan, K. Misri, S. Wadhwa, US 7446592, PVT Variation Detection and Compensation Circuit, Nov. 4, 2008.
Q. Khan, G.K. Sidhartha, Sequence-independent Power-on Reset for Multi-Voltage Circuits, US 7432748, Oct. 7, 2008.
D. Tripathi, J. Banerjee, Q. Khan, Differential Receiver Circuit, US 7414462, Aug. 19, 2008.
Q. Khan, H. Fukazawa, T. Nandurkar, Charge Pump Circuit for High Side Drive Circuit and Driver Driving Voltage Circuit, US 7388422, Jun. 17, 2008.
G. K. Sidhartha, Q. Khan, D. Tripathi, S. Wadhwa, K. Misri, PVT Variation Detection and Compensation Circuit, US 7388419, Jun. 17, 2008.
N. Krishnapura(with I. Shpantzer et al.), “System and method for code division multiplexed optical communication”, US 7,167,651, Jan. 23, 2007.
Q. Khan, D. Tripathi, Transmission Line Driver Circuit, US 7292073, Nov. 6, 2007.
D. Tripathi, Q. Khan, K. Misri, Transmission Line Driver, US 7187197, Mar. 6, 2007.
S. Wadhwa, Q. Khan, K. Misri, D. Muhury, Digital Clock Frequency Doubler, US 7132863, Nov. 7, 2006.
Q. Khan, D. Tripathi, K. Misri, High Voltage Level Converter Using Low Voltage Devices, US 7102410, Sep. 5, 2006.
Q. Khan, S. Wadhwa, K. Misri, Bandgap Reference Circuit, US 7084698, Aug. 1, 2006.
Q. Khan, S. Wadhwa, K. Misri, Bidirectional Level Shifter, US 7061299, Jun, 13, 2006.
Q. Khan, S. Wadhwa, K. Misri, Single Supply Level Shifter, US 7009424, Mar. 7, 2006.
Shanthi Pavan, “Integrated circuit implementation for power and area efficient adaptive equalization”, US 7,142,596, Nov 28, 2006; jointly assigned to Indian Institute of Technology Madras and Vitesse Semiconductor, California.
N. Krishnapura(with I. Shpantzer et al.), “System and method for orthogonal frequency division multiplexed optical communication”, US 7,076,169, Jul. 11, 2006.
John S. Wang, Sudeep Bhoja, Shanthi Pavan, Hai Tao, “Method and apparatus for improved high-speed adaptive equalization”, US 7,003,228, Feb. 21, 2006.
Shanthi Pavan et al., “Mobility Compensation in MOS Integrated Circuits”, US 6,822,505, 23 Nov. 2004.
N. Krishnapura and Y. Tsividis, “Circuits with Dynamic Biasing”, US 6,816,003, Nov. 9, 2004.
N. Krishnapura and Y. Tsividis, “Circuits with Dynamic Biasing”, US 6,717,461, Apr. 6, 2004.
N. Krishnapura and Y. Tsividis, “Circuits with Dynamic Biasing”, US 6,683,492, Jan. 27, 2004.
P. Kinget and N. Krishnapura, “Glitch Free Phase Switching Synthesizer”, US 6,671,341, Dec. 30, 2003.
Shanthi Pavan et al., “Method and System for Compensation of Low-frequency Photodiode Current in a Transimpedance Amplifier”, US 6,552,615, 22 Apr. 2003.
Shanthi Pavan et al., “Programmable Analog Tapped Delay Line Filter Having Cascaded Differential Delay Cells”, US 6,545,567, 8 Apr. 2003.
Shanthi Pavan, “Fixed Transconductance Bias Apparatus”, US 6,400,185, 4 Jun. 2002.
Shanthi Pavan et al., “Fast Acting Polarity Detector”, US 6,369,726, 2 Apr. 2002.
Shanthi Pavan, “Low Distortion Sample-and-Hold Circuit”, US 6,323,697, 27 Nov. 2001.
Shanthi Pavan, “High Frequency Boost Technique”, US 6,304,134, 16 Oct. 2001
P. Kinget and N. Krishnapura, “Programmable Frequency Divider”, US 6,281,721, Aug. 28, 2001.
Shanthi Pavan et al., “Method and Apparatus for Tuning High-Q Bandpass Filters using Pulse Excitation”, US 5,945,889, 31 Aug. 1999.