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publications:start 2012/05/27 17:52 publications:start 2013/04/08 20:55 current
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-===== 2012 =====+ 
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 +===== 2013 =====   
 +  * T.Nandi, K.Boominathan and S.Pavan, "Continuous-time Delta Sigma Modulators with Enhanced Linearity and Reduced Clock Jitter Sensitivity using the Switched Capacitor Return to Zero DAC", // IEEE Journal of Solid State Circuits //, August 2013 (to appear). 
 +  * M.Veeramani, P.Shyam, N.Ratchagar,A.Chadha, E.Bhattacharya and S.Pavan, "A Miniaturized pH Sensor With an Embedded Counter Electrode and a Readout Circuit", // IEEE Sensors Journal //, May 2013. 
 +  * A. Jain and S. Pavan, "Improved Characterization of High Speed Continuous-Time Delta Sigma Modulators Using a Duobinary Test Interface," // Proceedings of the International Symposium on Circuits and Systems (ISCAS)//, Beijing, May 2013. 
 +  * S. Pavan, "A Time Domain Perspective of the Signal Transfer Function of a Continuous-time Delta Sigma Modulator," // IEEE Transactions on Circuits and Systems : Express Briefs //, February 2013. 
 +  * S. Pavan, "Simulation Techniques in Data Converter Design," // Tutorial at the International Solid State Circuits Conference (ISSCC) //, February 2013. 
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 +===== 2012 =====  
 +  * P. Shettigar and S.Pavan, "Design Techniques for Wideband Continuous-time Delta-Sigma Modulators with FIR Feedback DACs," // IEEE Journal of Solid State Circuits //, December 2012. 
 +  * T. Nandi, K. Boominathan and S.Pavan, " A Continuous-time Delta Sigma Modulator with 87dB Dynamic Range in a 2MHz Signal Bandwidth Using a Switched-Capacitor Return-to-Zero DAC," //Proceedings of the 2012 Custom Integrated Circuits Conference (CICC) //, San Jose, California, 2012. 
 +  * R.S.Rajan and S.Pavan, "Device Noise in continuous-time delta-sigma modulators," //IEEE Transactions  on Circuits and Systems: Regular Papers //, September 2012. 
 +  * V. Singh, N. Krishnapura, S.Pavan, B.Vigraham, D.Behera and N.Nigania "A 16 MHz BW 75 dB DR CT  Delta Sigma ADC Compensated for More Than One Cycle Excess Loop Delay," //IEEE Journal of Solid State Circuits //,August 2012.  
 +  * A.Jain, N. Muthusubramaniam and S.Pavan, "Analysis and Design of a High Speed Continuous Time Delta Sigma Modulator Using the Assisted Opamp Technique," //IEEE Journal of Solid State Circuits //, July 2012. 
 +  * R.S.Rajan and S.Pavan, "Noise in CT DS Modulators with Switched Capacitor Feedback DACs," //Proceedings of the 2012 IEEE International Symposium on Circuits and Systems (ISCAS) //, Seoul, Korea, 2012.
  * Nagendra Krishnapura, "Introducing Negative Feedback with an Integrator as the Central Element," //2012 International Symposium on Circuits and Systems (ISCAS)//, Seoul, South Korea, 20-23 May 2012. ([[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-negfbwint-pap.pdf|paper]], [[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-negfbwint-sl.pdf|slides]])   * Nagendra Krishnapura, "Introducing Negative Feedback with an Integrator as the Central Element," //2012 International Symposium on Circuits and Systems (ISCAS)//, Seoul, South Korea, 20-23 May 2012. ([[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-negfbwint-pap.pdf|paper]], [[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-negfbwint-sl.pdf|slides]])
  * Nagendra Krishnapura, "Synthesis Based Introduction to Opamps and Phase Locked Loops," //2012 International Symposium on Circuits and Systems (ISCAS)//, Seoul, South Korea, 20-23 May 2012. ([[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-opamppllsynth-pap.pdf|paper]], [[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-opamppllsynth-sl.pdf|slides]])   * Nagendra Krishnapura, "Synthesis Based Introduction to Opamps and Phase Locked Loops," //2012 International Symposium on Circuits and Systems (ISCAS)//, Seoul, South Korea, 20-23 May 2012. ([[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-opamppllsynth-pap.pdf|paper]], [[http://www.ee.iitm.ac.in/~nagendra/papers/isc12-opamppllsynth-sl.pdf|slides]])
 +  * Sankaran Aniruddhan, "Quadrature generation techniques in CMOS relaxation oscillators," //2012 International Symposium on Circuits and Systems (ISCAS)//, Seoul, South Korea, 20-23 May 2012. ([[http://www.ee.iitm.ac.in/~ani/papers/ISCAS12-QRXO-paper.pdf|paper]], [[http://www.ee.iitm.ac.in/~ani/papers/ISCAS12-QRXO-slides.pdf|slides]])
  * P. Shettigar and S.Pavan, "A 15mW 3.6GS/s CT-Delta Sigma ADC with 36MHz Bandwidth and 83dB Dynamic Range in 90nm CMOS," //Proceedings of the 2012 IEEE International Solid State Circuits Conference (ISSCC) //, San Francisco, February 2012. **(Winner of the ISSCC 2012 Silk Road Award)**   * P. Shettigar and S.Pavan, "A 15mW 3.6GS/s CT-Delta Sigma ADC with 36MHz Bandwidth and 83dB Dynamic Range in 90nm CMOS," //Proceedings of the 2012 IEEE International Solid State Circuits Conference (ISSCC) //, San Francisco, February 2012. **(Winner of the ISSCC 2012 Silk Road Award)**
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===== 2011 ===== ===== 2011 =====