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publications:start [2019/04/22 15:49] shanthi [2019] |
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| ===== 2019 ===== | ===== 2019 ===== | ||
| + | * Raviteja Theertham, Prasanth Kootala, Sujith Billa, and Shanthi Pavan, "A 24mW chopped CTDSM achieving 103.5dB SNDR and 107.5dB DR in a 250kHz bandwidth," // IEEE Symposium on VLSI Circuits, Kyoto, Japan //, June 2019. | ||
| + | * Raviteja Theertham and Shanthi Pavan, "Unified analysis, modeling, and simulation of chopping artifacts in continuous-time delta-sigma converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | ||
| + | * Kishalay Dutta, Vinod Menezes and Shanthi Pavan, "Analysis and design of cyclic switched-capacitor DC-DC converters," // IEEE Transactions on Circuits and Systems: Regular Papers //, (to appear). | ||
| + | * Saravana Manivannan and Shanthi Pavan, "Degradation of alias rejection in continuous-time bandpass delta-sigma converters due to weak loop filter nonlinearities," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. | ||
| + | * Shanthi Pavan, "Simplified analysis of total integrated noise in passive switched-capacitor and N-path filters," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. | ||
| + | * Shanthi Pavan, "An alternative approach to Bode's Noise Theorem," // IEEE Transactions on Circuits and Systems: Express Briefs//, May 2019. | ||
| * Abirmoya Santra, Angelo De Carmine, Guttha Venkata Sesha Rao, Qadeer A. Khan, "A Highly Scalable, Time-Based Capless Low-Dropout Regulator Using Master-Slave Domino Control," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. (Accepted for presentation). | * Abirmoya Santra, Angelo De Carmine, Guttha Venkata Sesha Rao, Qadeer A. Khan, "A Highly Scalable, Time-Based Capless Low-Dropout Regulator Using Master-Slave Domino Control," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. (Accepted for presentation). | ||
| * Chithra and Nagendra Krishnapura, "Static Phase Offset Reduction Technique for Delay Locked Loops," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. (Accepted for presentation). | * Chithra and Nagendra Krishnapura, "Static Phase Offset Reduction Technique for Delay Locked Loops," //2019 International Symposium on Circuits and Systems (ISCAS)//, 26-29 May 2019, Sapporo, Japan. (Accepted for presentation). | ||