This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision Last revision Both sides next revision | ||
courses:ee6361_2019:start [2019/04/12 07:18] janakiraman |
courses:ee6361_2019:start [2019/04/23 10:04] janakiraman |
||
---|---|---|---|
Line 148: | Line 148: | ||
- | ===== Class 12 (5 Apr 2019) ===== | + | ===== Class 13 (12 Apr 2019) ===== |
* Redundancy and Testing | * Redundancy and Testing | ||
* Non Volatile Memories | * Non Volatile Memories | ||
Line 154: | Line 154: | ||
[[https://forms.gle/7NgWNBcYsndjrwSy6|In class quiz]] | [[https://forms.gle/7NgWNBcYsndjrwSy6|In class quiz]] | ||
+ | |||
+ | Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh R. Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian Iyer 80Kb Logic Embedded High-K Charge Trap Transistor based Multi-Time-Programmable Memory with no Added Process Complexity J. Solid State Circuits,53(3): 949-960 (2018) [[https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8252917&tag=1|PDF]] | ||
+ | |||
+ | [[http://www.ee.iitm.ac.in/~janakiraman/courses/EE6361/Jan-2018/material/eNVRAM_Talk_at_IISc_Sep26_v15.pdf|eNVM Lecture Slides ]] | ||