Integrated Circuits and Systems group, IIT Madras

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courses:ee6361_2019:start [2019/04/05 06:34]
janakiraman
courses:ee6361_2019:start [2019/04/22 10:46]
janakiraman [Class 13 (12 Apr 2019)]
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 [[https://​forms.gle/​9Y1RgQBuT4qiugpH7|In class quiz]] [[https://​forms.gle/​9Y1RgQBuT4qiugpH7|In class quiz]]
  
 +
 +===== Class 13 (12 Apr 2019) =====
 +  * Redundancy and  Testing
 +  * Non Volatile Memories
 +  * Charge Trap Transistor
 +
 +[[https://​forms.gle/​7NgWNBcYsndjrwSy6|In class quiz]]
 +
 +Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan,​ Alberto Cestero, Ming Yin, John Golz, Rajesh R. Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian Iyer 80Kb Logic Embedded High-K Charge Trap Transistor based Multi-Time-Programmable Memory with no Added Process Complexity J. Solid State Circuits,​53(3):​ 949-960 (2018) [[https://​ieeexplore.ieee.org/​stamp/​stamp.jsp?​tp=&​arnumber=8252917&​tag=1|PDF]]