Integrated Circuits and Systems group, IIT Madras

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EE6324: Phase-Locked Loops(May-Aug. 2020)

Instructor

Classroom

  • Online

Schedule

  • Tue./Thu.: 4:00-5:15 PM
  • Alternate Friday

Course page on moodle

Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Teaching Assistants

Login to moodle at https://courses.iitm.ac.in/ to post questions and contact faculty.

Evaluation

  • Assignments (10%)
  • Quiz-I (20%)
  • Quiz-II (20%)
  • Project (20%)
  • End Sem (30%)

Recorded lectures

The recorded lectures are listed below.

  1. Lecture#1(pdf): Introduction to PLLs
  2. Lecture#2(pdf): Crystal/LC oscillator as clock source, Basic operation of a PLL
  3. Lecture#3(pdf): Basic operation of a PLL with mixer, loop filter, and voltage controlled oscillator at block level
  4. Lecture#4(pdf): Basic operation of a PLL with mixer, loop filter, and voltage controlled oscillator at block level (contd.)
  5. Lecture#5(pdf): Small-signal model of a basic PLL, Type/order of a PLL
  6. Lecture#6(pdf): Frequency acquisition in Type-I PLL
  7. Lecture#7(pdf): Frequency acquisition in Type-I/II PLL
  8. Lecture#8(pdf): Frequency acquisition in Type-I/II PLL (contd.)
  9. Lecture#9(pdf): Frequency acquisition in Type-II PLL (contd.)
  10. Lecture#10(pdf): Different types of Phase Error Detector (PD)
  11. Lecture#11(pdf): Sample & hold based PD, XOR based PD
  12. Lecture#12(pdf): XOR based PD, S-R flip flop based PD, Range extension of PDs
  13. Lecture#13(pdf): 3-state PFD, D flip flop based PD
  14. Lecture#14(pdf): Frequency Detectors
  15. Lecture#15(pdf): Charge-pump PLL
  16. Lecture#16(pdf): Design methodology for a type-II order-3 charge-pump PLL (CP-PLL)
  17. Lecture#17(pdf): Sources of non-linearity in CP-PLL, Noise analysis in CP-PLLs
  18. Lecture#18(pdf): Noise analysis in CP-PLLs (contd.)
  19. Lecture#19(pdf): Noise analysis in CP-PLLs (contd.)
  20. Lecture#20(pdf): Oscillators, Barkhausen Criterion
  21. Lecture#21(pdf): Small swing differential oscillators
  22. Lecture#22(pdf): Large swing CMOS ring oscillators
  23. Lecture#23(pdf): Large swing CMOS ring oscillators (contd.)
  24. Lecture#24(pdf): Large swing CMOS ring oscillators (contd.)
  25. Lecture#25(pdf): Regulators for ring oscillators
  26. Lecture#26(pdf): Regulators for ring oscillators (contd.)
  27. Lecture#27(pdf): Phase noise in ring oscillators
  28. Lecture#28(pdf): Phase noise in ring oscillators (contd.), Circuit design of PLL building blocks (PFD)
  29. Lecture#29(pdf): Circuit design of PLL building blocks (PFD)

Assignments

Assignments will be posted below. You are expected to solve them on your own. You should submit each one by 09:00AM of the due date mentioned. Copying will carry strict penalties.

Course contents

Topics include analog and digital integer-N phase-locked loops (PLLs). Building blocks include phase/frequency detectors, charge-pump, LC/ring-oscillators, multi-modulus frequency dividers, active/passive loop-filter, etc.

Objectives

To develop intuition behind frequency synthesizer design, learning mathematical basis behind operation, and realizing PLLs at architecture and transistor level.

References

  • F. Gardner, Phaselock Techniques, John Wiley & Sons, 2005.
  • W. Egan, Phase-Lock Basics, John Wiley & Sons, 2008.
  • R. Best, Phase-Locked Loops : Design, Simulation, and Applications, McGraw Hill, 2003.

Pre-requisites

Attendance

Attendance will be strictly enforced.