1. S.Manivannan and S.Pavan, ``A 65nm CMOS Continuous-Time Pipeline ADC achieving 70dB SNDR in 100MHz Bandwidth" IEEE Solid-State Circuits Letters , May 2021.


2. A.Baluni and S.Pavan, ``Analysis and Design of a 20 MHz Bandwidth Continuous-Time Delta-Sigma Modulator With Time-Interleaved Virtual-Ground-Switched FIR Feedback " IEEE Journal of Solid-State Circuits , March 2021.


3. S.Pavan and H.Shibata, ``Continuous-time Pipelined Analog-to-Digital Converters: A Mini-Tutorial" IEEE Transactions on Circuits and Systems: Express Briefs , March 2020.


4. S.Manivannan and S.Pavan, ``Improved Continuous-Time Delta-Sigma Modulators with Embedded Active Filtering" IEEE Transactions on Circuits and Systems: Regular Papers , October 2020.


5. S.Billa, S.Dixit and S.Pavan, ``Analysis and Design of an Audio Continuous-Time 1-X FIR-MASH Delta-Sigma Modulator" IEEE Journal of Solid State Circuits , October 2020.


6. R.Theertham, P.Koottala, S.Billa and S.Pavan, ``Design Techniques for High-Resolution Continuous-Time Delta-Sigma Converters With Low In-Band Noise Spectral Density " IEEE Journal of Solid State Circuits , September 2020.


7. S.Javvaji, V.Singhal, V.Menezes, R.Chauhan and S.Pavan, ``Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting " IEEE Journal of Solid State Circuits , September 2019.


8. R.Theertham and S.Pavan, ``Improved Offline Calibration of DAC Mismatch Errors in Delta Sigma Data Converters ," IEEE Transactions on Circuits and Systems: Express Briefs, October 2019.


9. R.Theertham and S.Pavan, ``Unified Analysis, Modeling, and Simulation of Chopping Artifacts in Continuous-Time Delta-Sigma Modulators ," IEEE Transactions on Circuits and Systems: Regular Papers, August 2019.


10. K.Datta and S.Pavan, ``Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters ," IEEE Transactions on Circuits and Systems: Regular Papers, August 2019.


11. S.Pavan, ``An Alternative Approach to Bode's Noise Theorem ," IEEE Transactions on Circuits and Systems: Express Briefs, May 2019.


12. S. Manivannan and S.Pavan, ``Degradation of Alias Rejection in Continuous-Time Delta Sigma Modulators by Weak Loop-Filter Nonlinearities ," IEEE Transactions on Circuits and Systems: Regular Papers, October 2018.


13. S.Pavan and E.Klumperink, ``Generalized Analysis of High-Order Switch-RC N-Path Mixers/Filters Using the Adjoint Network," IEEE Transactions on Circuits and Systems: Regular Papers, to appear, 2018.


14. S.Pavan, ``Improved Chopping in Continuous-time Delta-Sigma Modulators using FIR Feedback and N-path Techniques," IEEE Transactions on Circuits and Systems: Express Briefs, May 2018.


15. S.Pavan and E.Klumperink, ``Analysis of the Effect of Source Capacitance and Inductance on N-Path Mixers and Filters," IEEE Transactions on Circuits and Systems: Regular Papers, to appear, 2018.


16. A.Jain and S.Pavan, ``Continuous-time Delta-Sigma Modulators using Time-Interleaved FIR Feedback," IEEE Transactions on Circuits and Systems: Regular Papers, February 2018.


17. H.Shibata, V.Kozlov, Z.Ji, A.Ganesan, H.Zhu, D. Paterson, J.Zhao, S.Patil and S.Pavan,``A 9 GS/s 1.125 GHz BW Oversampling Continuous-Time Pipeline ADC Achieving -164 dBFS/Hz NSD," IEEE Journal of Solid-State Circuits, December 2017.


18. S.Billa, A.Sukumaran and S.Pavan,``Analysis and Design of Continuous-time Delta-Sigma Modulators Incorporating Chopping," IEEE Journal of Solid-State Circuits, September 2017.


19. S.Pavan, and E.Klumperink, ``Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network," IEEE Transactions on Circuits and Systems: Regular Papers, to appear, 2017.


20. N.Sinha, M.Rachid, S.Pavan and S.Pamarti ``Design and Analysis of an 8 mW, 1 GHz Span, Passive Spectrum Scanner With >+31 dBm Out-of-Band IIP3 Using Periodically Time-Varying Circuit Components," IEEE Journal of Solid State Circuits, to appear, 2017.


21. S.Pavan, ``Analysis of Chopped Integrators and its Application to Continuous-time Delta Sigma Modulator Design," IEEE Transactions on Circuits and Systems: Regular Papers, to appear, 2017.


22. A.Sukumaran and S.Pavan, ``Continuous-time Delta Sigma Modulators with Dual Switched Capacitor Return-to-Zero DACs ," IEEE Journal of Solid State Circuits , July 2016.


23. J. de la Rosa, R.Schreier, K.P.Pun and S.Pavan, ``Next-generation Delta-Sigma Converters : Trends and Perspectives," IEEE Journal of Emerging Topics in Circuits and Systems , December 2015.


24. A.Sukumaran and S.Pavan, ``Low Power Design Techniques for Single-Bit Audio Continuous-Time Delta Sigma ADCs Using FIR Feedback," IEEE Journal of Solid State Circuits , November 2014.


25. R.S.Rajan and S.Pavan, ``Design Techniques for Continuous-Time Delta Sigma ADCs with Embedded Active Filtering" IEEE Journal of Solid State Circuits , October 2014.


26. S.Pavan and R.S.Rajan, ``Simplified Analysis and Simulation of the STF, NTF and Noise in CTDSMs," IEEE Transactions on Circuits and Systems: Express Briefs , Sept. 2014.


27. S.Pavan and R.S.Rajan, ``Interreciprocity in linear periodically time varying networks with sampled outputs," IEEE Transactions on Circuits and Systems: Express Briefs , Sept. 2014.


28. N.Rajesh and S.Pavan, `` Design of Lumped Component Programmable Delay Elements for Ultra-Wideband Beamforming," IEEE Journal of Solid State Circuits , August 2014.


29. S.Pavan, ``Continuous-time Delta Sigma Modulator Design using the Method of Moments," IEEE Transactions on Circuits and Systems: Regular Papers , June 2014.


30. A.Jain and S.Pavan, ``Continuous-time Delta Sigma Modulators with Enhanced Linearity and Reduced Clock Jitter Sensitivity using the Switched Capacitor Return to Zero DAC," IEEE Transactions on Circuits and Systems: Regular Papers , May 2014.


31. T.Nandi, K.Boominathan and S.Pavan, ``Continuous-time Delta Sigma Modulators with Enhanced Linearity and Reduced Clock J itter Sensitivity using the Switched Capacitor Return to Zero DAC," IEEE Journal of Solid State Circuits , August 2013.


32. M.S.Veeramani, P.Shyam, N.Ratchagar,A.Chadha, E.Bhattacharya and S.Pavan,``A Miniaturized pH Sensor With an Embedded Cou nter Electrode and a Readout Circuit," IEEE Sensors Journal , May 2013.


33. S.Pavan,``A Time Domain Perspective of the Signal Transfer Function of a Continuous-time Delta Sigma Modulator," IEEE Transactions on Circuits and Systems : Express Briefs , February 2013.


34. P.Shettigar and S.Pavan,``Design Considerations for Wideband Single Bit Delta Sigma Modulators with FIR Feedback DACs IEEE Journal of Solid State Circuits , December 2012.


35. R.S.Rajan and S.Pavan,``Device Noise in Continuous Time Oversampled Converters," IEEE Transactions in Circuits and Systems, September 2012.


36. V.Singh, N. Krishnapura, S.Pavan, B.Vigraham, D.Behera and N. Nigania,``A 16 MHz BW 75 dB Dynamic Range CT Delta Sigma A DC Compensated for more than one Cycle Excess Loop Delay," IEEE Journal of Solid State Circuits, August 2012.


37. A. Jain, M. Venkatesan and S.Pavan,``Design and Analysis of a High Speed Continuous Time Delta Sigma Modulator using the Assisted Opamp Technique," IEEE Journal of Solid State Circuits, July 2012.


38. S. Thyagarajan, S. Pavan and P.Sankar,``Active filters using the Gmm-assisted OTA-RC technique", IEEE Journal of Solid State Circuits, July 2011.


39. S. Pavan, ``On continuous-time Delta Sigma modulators with Return-to-Open DACs", IEEE Transactions on Circuits and Systems : Express Briefs, May 2011.


40. S. Pavan, ``Alias rejection of continuous-time oversampling converters with switched-capacitor feedback DACs", IEEE Transactions on Circuits and Systems : Regular Papers, February 2011.


41. V. Singh, N. Krishnapura and S. Pavan, ``Compensating for quantizer delay in excess of one clock cycle in continuous-time Delta-Sigma modulators", IEEE Transactions on Circuits and Systems : Express Briefs, September, 2010.


42. S. Pavan, ``Efficient simulation of weak nonlinearities in continuous-time oversampling converters", IEEE Transactions on Circuits and Systems : Regular Papers, August 2010. (paper)


43. S. Pavan and P. Sankar, "Power reduction in continuous-time Delta-Sigma modulators using the assisted opamp technique", IEEE Journal of Solid State Circuits, July 2010. (paper)


44. K. Reddy and S.Pavan, "A power efficient continuous time Sigma-Delta modulator with 15 MHz bandwidth and 70 dB dynamic range", Analog Integrated Circuits and Signal Processing, June 2010. (paper)


45. S. Pavan, "Systematic design centering of continuous-time oversampling converters", IEEE Transactions on Circuits and Systems : Express Briefs, March 2010 (paper)


46. T.Laxminidhi,V.Prasadu and S.Pavan, ``Widely Programmable High Frequency Active-RC Filters in CMOS Technology", IEEE Transactions on Circuits and Systems I : Regular Papers,(paper) February 2009.


47. S.Pavan, ``Excess Loop Delay Compensation in Continuous-time Delta Sigma Modulators", IEEE Transactions on Circuits and Systems II : Express Briefs, November 2008.(paper).


48. S. Pavan, ``Power and Area Efficient Adaptive Equalization at Microwave Frequencies", IEEE Transactions on Circuits and Systems I : Regular Papers, July 2008.(paper)


49. S. Pavan, N. Krishnapura, R. Pandarinathan and P. Sankar, ``A Power Optimized Continuous-time Delta-Sigma Modulator for Audio Applications," IEEE Journal of Solid State Circuits, February 2008.(paper)


50. P. Sankar and S. Pavan,``Analysis of Integrator Nonlinearity in a Class of Continuous-Time Delta-Sigma Modulators", IEEE Transactions on Circuits and Systems : Express Briefs, December 2007.(paper)


51. K. Reddy and S. Pavan, ``Fundamental Limitations of Continuous-time Delta Sigma Modulators due to Clock Jitter", IEEE Transactions on Circuits and Systems : Regular Papers, October 2007.(paper)


52. S. Pavan and T. Laxminidhi, ``Accurate Characterization of Integrated Continuous Time Filters", IEEE Journal of Solid State Circuits, August 2007.(paper)


53. T. Laxminidhi and S. Pavan,``Efficient Design Centering of High Frequency Continuous Time Filters", IEEE Transactions on Circuits and Systems : Regular Papers, July 2007.(paper)


54. S. Pavan and N. Krishnapura, ``Automatic Tuning of Time-Constants in Continuous-Time Delta-Sigma Modulators", IEEE Transactions on Circuits and Systems : Express Briefs, April 2007.(paper)


55. S. Pavan and R. Tiruvuru, ``Analysis and Design of Singly Terminated Transmission-Line FIR Adaptive Equalizers" IEEE Transactions on Circuits and Systems : Regular Papers, February 2007. (paper)


56. V. Srinivas, S. Pavan, A. Lachhwani and N. Sasidhar,`` A Distortion Compensating Flash Analog to Digital Conversion Technique," IEEE Journal of Solid State Circuits. September 2006. (paper)


57. S. Pavan and S. Shivappa,``Nonidealities in Traveling Wave and Transversal FIR Filters Operating at Microwave Frequencies", IEEE Transactions on Circuits and Systems : Regular Papers , January 2006. (paper)


58. S. Pavan, M. Tarsia, S. Kudszus and D. Pritzkau,`` Design considerations for Integrated Modulator Drivers in SiGe Technology", International Journal of High Speed Electronics and Systems, September 2005.


59. S. Pavan, ``Continuous-Time Integrated FIR Filters at Microwave Frequencies", IEEE Transactions on Circuits and Systems-II, Analog and Digital Signal Processing, January 2004. (paper)


60. K. Nagaraj, D. Martin, M. Wolfe, R. Chattopadhyay, S. Pavan, J. Cancio and T. R. Viswanathan, ``A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit A/D converter in a 0.25-um digital CMOS process", IEEE Journal of Solid State Circuits, December 2000.


61. S. Pavan and Y. Tsividis, ``Time Scaled Electrical Networks - Properties and Applications in the Design of Programmable Analog Filters", IEEE Transactions on Circuits and Systems - Analog and Digital Signal Processing, , Vol. 47, No.2, pp. 161-5, February 2000.(paper)


62. S. Pavan, Y. Tsividis and K. Nagaraj, `` Widely Programmable High Frequency Continuous Time Filters in Digital CMOS Technology", IEEE Journal of Solid State Circuits,, Vol. 35, No.4, April 2000.(paper)


63. S. Pavan and Y. Tsividis, ``An Analytical Solution to a Class of Oscillators and its Application to Filter Tuning'', IEEE Transactions on Circuits and Systems-I, vol. 45, no. 9, pp. 1242-1249, May 1998. (paper)

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Manuals

Solutions Manual : Operation and Modeling of the MOS Transistor (by Yannis Tsividis)
Mehran Bagheri & Shanthi Pavan

McGraw Hill Publishing Company, New York, NY