Dr. Sridharan, K.

Name:   Dr. Sridharan, K.
Designation:   Professor

Office Address:   ESB 204C
Department of Electrical Engineering
IIT Madras
Chennai - 600 036
Phone number:   +91 - 44 - 2257 4423 (O)
Ph.D. From:   RPI, New York, U.S.A.
e-mail address(es):   sridhara[AT]ee.iitm.ac.in

Personal home page:   http://www.ee.iitm.ac.in/~sridhara/
 
  Areas of Research:  
 
  • Algorithms and Architectures for Robotics and Vision

  • FPGA-based Designs


  
  List of Students:  
 
  • MS: Completed: Nil , Ongoing: 1

  • Ph.D Completed:3 , Ongoing: 2

 
 
 
  Most recently published papers:  
 

Publications in Refereed Journals:
  • P.K. Meher, Javier Valls, Tso-Bing Juang, K. Sridharan and K. Maharatna, 50 Years of CORDIC: Algorithms, Architectures and Applications, Accepted in IEEE Transactions on Circuits and Systems - Part I: Regular Papers, May 2009

  • Leena Vachhani, K. Sridharan and Pramod K.Meher, Efficient CORDIC algorithms and architectures for low area and high throughput imple- mentation, IEEE Transactions on Circuits and Systems - Part II:Express Briefs, Vol. 56, No.1, January 2009, pp. 61-65.

  • Leena Vachhani and K. Sridharan, Hardware-efficient Prediction-Correction Based Generalized Voronoi Diagram Construction and FPGA Imple- mentation, IEEE Transactions on Industrial Electronics, Vol. 55, Issue 4, April 2008, pp. 1558-1569.

Conference Proceedings:

  • Leena Vachanai, Arun D. Mahindrakar and K. Shridharan, "Hardware architecture for control-law based Voroni diagram computation and FPGA implementation," in Proc. IEEE TENCON Conference, Hyderabad, India. Nov. 2008.

Book:

  • K. Sridharan and Panakala Rajesh Kumar, Robotic Exploration and Landmark Determination - Hardware-Efficient Algorithms and FPGA Implementations, Springer Verlag, Heidelberg, Studies in Computational Intelligence Book Series - Vol. 81, ISBN 978-3-540-75393-3, January 2008.